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review.coreboot.org / coreboot / 266041f0e62296737617cc2fcfa97f31e2b43aea / src / device / dram / ddr4.c
  1. 6de8b42 arch/x86: Refactor the SMBIOS type 17 write function by Subrata Banik · 2 years, 10 months ago
  2. 0949e73 src/acpi to src/lib: Fix spelling errors by Martin Roth · 2 years, 11 months ago
  3. 63e98fc src/device/dram: Add terminating new lines to printk strings by Nikolai Vyssotski · 3 years, 2 months ago
  4. 6c6e049 device/dram/ddr4.h: Align with DDR3 and DDR2 by Angel Pons · 3 years, 5 months ago
  5. a01ee36 device/dram: Add method for converting MHz to MT/s by Rob Barnes · 4 years ago
  6. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 3 months ago
  7. c74dae9 src/device: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 5 months ago
  8. 540a980 printf: Automatically prefix %p with 0x by Julius Werner · 4 years, 8 months ago
  9. 2a0fbe3 device/dram/ddr4: Check spd_bytes_total and spd_bytes_used values by Elyes HAOUAS · 5 years ago
  10. 99f83bb AUTHORS: Move src/device copyrights into AUTHORS file by Martin Roth · 5 years ago
  11. 3f85edb dram: Add basic DDR4 SPD parsing by Andrey Petrov · 5 years ago