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review.coreboot.org / coreboot / 1e24bf3f719f82c16fd577e87900e1aa0fd6605b / src
  1. fa90fd4 rtc: erase CMOS memory after power failure by Vincent Palatin · 12 years ago
  2. becacec AMD G34 CPU: change lapic_id in northbridge.c to accommodate G34 CPU by Siyuan Wang · 12 years ago
  3. cf81b82 CMOS: Move MRC seed offset into upper bank by Duncan Laurie · 12 years ago
  4. fc1b9ee rtc: force mc146818 register D to a correct value by Vincent Palatin · 12 years ago
  5. 6f42976 Fix CONFIG_ use in i8254.c by Stefan Reinauer · 12 years ago
  6. 52095f5 Add POST code for "All devices initialized" by Stefan Reinauer · 12 years ago
  7. b6e1237 Move global variable check to Makefile by Stefan Reinauer · 12 years ago
  8. d16d576 Leave power control registers unlocked by Sameer Nanda · 12 years ago
  9. b578627 Fix whitespace issue with help message in Kconfig file by Dave Frodin · 12 years ago
  10. 6f05c2eb AMD rd890 late.c: Don't enable PCIe ports after PCIe init. by Siyuan Wang · 12 years ago
  11. fa678bb AMD agesa family15: PCI domain should scan bus from 0x18.0 by Siyuan Wang · 12 years ago
  12. 3b590ff acpi: Add support for DMAR tables (Intel IOMMU support) by Patrick Georgi · 12 years ago
  13. a93c3fe Drop redundant CHIP_NAME in mainboard.c by Kyösti Mälkki · 12 years ago
  14. d635068 smsc/lpc47n227: Make early_serial usable by Patrick Georgi · 12 years ago
  15. 68d7c7a cpu/intel/model_1067x: Add proper c-state/p-state/thermal support by Nico Huber · 12 years ago
  16. bf10bc3 intel/socket_BGA956: enable speedstep, CAR, MMX, SSE by Patrick Georgi · 12 years ago
  17. 7d54eb8 Add name field for device by Kyösti Mälkki · 12 years ago
  18. a74af56 Overhaul speedstep code by Nico Huber · 12 years ago
  19. 252d39b Fix some indentation flaws and break very long lines by Nico Huber · 12 years ago
  20. 7309709 remove enable_cache() of 3 mainboards by Siyuan Wang · 12 years ago
  21. 75a26f8 Persimmon: disable the unconnected Full-Speed USB port by Dave Frodin · 12 years ago
  22. f3b86b3 AMD agesa: add enable cache at the end of disable_cache_as_ram by Siyuan Wang · 12 years ago
  23. ad874e3 Correct FSB reading in speedstep ACPI by Nico Huber · 12 years ago
  24. 1e0ddf6 Fix some issues with new "reference" toolchain by Stefan Reinauer · 12 years ago
  25. 41392df Merge cpu/intel/acpi.h into cpu/intel/speedstep.h by Nico Huber · 12 years ago
  26. bef3d34 Add support for socket LGA775 by Stefan Tauner · 12 years ago
  27. 335450d Fix ExecuteFinalHltInstruction function in f15h family code by Kostr · 12 years ago
  28. 80adfdf AMD SB800: PCIE slots on Persimmon by Zheng Bao · 12 years ago
  29. 9ead80f Drop get_smbios_data from chip_operations by Kyösti Mälkki · 12 years ago
  30. 23c046b Fix reading of number of interrupts for IO-APICs by Nico Huber · 12 years ago
  31. f4ff56f Hide all _ROM_RUN Kconfig options if the payload is SeaBIOS by Peter Stuge · 12 years ago
  32. be0ede4 Run option ROMs in coreboot by default only if the payload is not SeaBIOS by Peter Stuge · 12 years ago
  33. b6fa47c Clarify that _ROM_RUN Kconfig options control if ROMs are run by coreboot by Peter Stuge · 12 years ago
  34. 892d8d2 IEI PM-LX2-800-R10: Added preliminary mainboard support by Ricardo Martins · 12 years ago
  35. 7baadac Take care of NULL chip_ops->name by Kyösti Mälkki · 12 years ago
  36. 95c607f iwave/iWRainbowG6: use 16bit access for a register which is not 32bit aligned by Sebastian Andrzej Siewior · 12 years ago
  37. 3e9155d northbridge/sch: move the \n so it reads a little better by Sebastian Andrzej Siewior · 12 years ago
  38. 6997b4b iwave/iWRainbowG6: remove USE_DCACHE_RAM by Sebastian Andrzej Siewior · 12 years ago
  39. 59e3e02 northbridge/sch: read the size of main memory from the proper register by Sebastian Andrzej Siewior · 12 years ago
  40. 50dd47b northbridge/sch: Read the GPU memory from the correct PCI device by Sebastian Andrzej Siewior · 12 years ago
  41. 66fa9e2 northbridge/sch: don't overwrite hightables with GPU / TSEG memory by Sebastian Andrzej Siewior · 12 years ago
  42. 1d1a68b Trinity: Initialize the pointer prior to using it by Zheng Bao · 12 years ago
  43. eb82572 change conflicted typedef in src/vendorcode/amd/agesa/f15/Porting.h by Siyuan Wang · 12 years ago
  44. 9b48ef2 Update SeaBIOS stable to the release-1.7.1 commit by Peter Stuge · 12 years ago
  45. 1b97bdc bachmann/ot200: Fix wrong IRQ number for PIRQD by Christian Gmeiner · 12 years ago
  46. 2feddbd iei/kino-780am2: Turn on PCIe bridge to 2nd ethernet controller. by Dave Frodin · 12 years ago
  47. 9aeb694 hpet: common ACPI generation by Patrick Georgi · 12 years ago
  48. aada2e1 Every chip must have chip_operations by Kyösti Mälkki · 12 years ago
  49. 9c9eb8c Take care of NULL chip_ops->name by Kyösti Mälkki · 12 years ago
  50. e5fe3ac Fix typo in mPGA603 socket by Kyösti Mälkki · 12 years ago
  51. 0279036 Remove chip.h files without config structure by Kyösti Mälkki · 12 years ago
  52. 1f0d379 Revert order in VGA device choice by Kostr · 12 years ago
  53. ee00e7b Mainboard: Fix IO-HUB link number in Dinar mainboard by Kostr · 12 years ago
  54. 4bb7a8d Provide access to smaller registers in eregs by Patrick Georgi · 12 years ago
  55. 89bbcf4 Use mainboard_interrupt_handlers everywhere by Patrick Georgi · 12 years ago
  56. f3a163a YABEL: Common API to register interrupt handlers by Patrick Georgi · 12 years ago
  57. 1ee8b45 add tyan s8226: add a new mainboard by Siyuan Wang · 12 years ago
  58. 70c660f pirq_routing: Allow routing with more than 4 PIRQ links by Alexandru Gagniuc · 12 years ago
  59. 14b248b Fix compilation without CONFIG_WRITE_HIGH_TABLES. by Denis 'GNUtoo' Carikli · 12 years ago
  60. 8d73692 AMD Hudson: Printf the high address as unsigned integer by Zheng Bao · 12 years ago
  61. 72cee54 HAVE_HIGH_TABLES is gone by Patrick Georgi · 12 years ago
  62. cf329ff AMD hudson: Round the float pointing number to integer by Zheng Bao · 12 years ago
  63. a7f374f cimx sb700: change Platform.h to remove some warnings by Siyuan Wang · 12 years ago
  64. 128c7d7 agesa fam15 northbridge: change lapic_id to accommodate two CPUs by Siyuan Wang · 12 years ago
  65. 1fb49df C32 legacy code: change CONFIG_CPU_AMD_SOCKET_C32 to CONFIG_CPU_AMD_SOCKET_C32_NON_AGESA by Siyuan Wang · 12 years ago
  66. fec5b64 AMD Hudson: use awk to calulate instead of expr by Zheng Bao · 12 years ago
  67. a59a9f7 Set SMBIOS mainboard version based on i2c eeprom by Christian Gmeiner · 12 years ago
  68. ea8011b Add i2c eeprom to device tree by Christian Gmeiner · 12 years ago
  69. 4adb19b Mahogany_Fam10: Fixes an apparent ACPI VGA resource collision. by Dave Frodin · 12 years ago
  70. 4b14e82 Fix tracing compilation on SMM enabled targets. by Rudolf Marek · 12 years ago
  71. 01a42ba Fix VT8237S USB IRQ routing by Rudolf Marek · 12 years ago
  72. cf8bcfc superio winbond w83627dhg: add a function which is used on tyan s8226 by Siyuan Wang · 12 years ago
  73. 87b5aa9e IEI/KINO: Fixes an apparent ACPI VGA resource collision. by Dave Frodin · 12 years ago
  74. e644bad VIA Nano: Add support for VIA Nano CPUs by Alexandru Gagniuc · 12 years ago
  75. 00b579a buildsystem: Make CPU microcode updating more configurable by Alexandru Gagniuc · 12 years ago
  76. eb1d39b AMD S3: The offset of the nv storage depends on config.h by Zheng Bao · 12 years ago
  77. 83a6dbd ioapic driver: typedef the ioapic_config struct (TRIVIAL) by Alexandru Gagniuc · 12 years ago
  78. 87213b6 Fix AMD UMA for RS780 by Kyösti Mälkki · 12 years ago
  79. 71c7a3f AMD hudson: Complete the missing rule by Zheng Bao · 12 years ago
  80. d2245bb Drop unused ISA Pnp definitions by Kyösti Mälkki · 12 years ago
  81. 3780597 SB700/SP5100: This configures the HPET clock period. by Dave Frodin · 12 years ago
  82. cc60198 AMD Hudson: Move the combining firmware from Python to sh. by Zheng Bao · 12 years ago
  83. 0a78f91 Intel model_106cx: change CAR to HT-capable by Kyösti Mälkki · 12 years ago
  84. c33f1e9 AMD northbridges: factor out CPU allocation by Kyösti Mälkki · 12 years ago
  85. cd9fc1a AMD northbridges: rewrite CPU allocation by Kyösti Mälkki · 12 years ago
  86. 8c02790 MPTABLE: check for fixed IRQ entries on all pins by Sven Schnelle · 12 years ago
  87. 651339b Fix mptable build troubles by Kyösti Mälkki · 12 years ago
  88. 5be2060 LUMPY: Add information to generate MPTABLE from devicetree.cb by Sven Schnelle · 12 years ago
  89. fee73df Auto-declare chip_operations by Kyösti Mälkki · 12 years ago
  90. 0d5d70b mptable: bring sanity back to mptable generation (TRIVIAL) by Alexandru Gagniuc · 12 years ago
  91. 0690eb2 Change to allow coreboot to use "add-payload" instead of "add" for payload images. by Dave Frodin · 12 years ago
  92. 64c40dd Don't write automatic IRQ entries for disabled devices by Sven Schnelle · 12 years ago
  93. de415eb coreboot: Dump memory around problem area when encountering exception by Alexandru Gagniuc · 12 years ago
  94. 7598bea AMD Hudson: Enable HD audio by zbao · 12 years ago
  95. 9de0fee Replicate TOP_MEM and TOP_MEM2 from BSP to AP CPU by Kyösti Mälkki · 12 years ago
  96. dbc4739 AMD northbridge: copy TOP_MEM and TOP_MEM2 for distribution by Kyösti Mälkki · 12 years ago
  97. 7874e9d Sandybridge: Fix integer overrun in romstage udelay() by Stefan Reinauer · 12 years ago
  98. 0db6820 Synchronize rdtsc instructions by Stefan Reinauer · 12 years ago
  99. 4c29d7f Do not allow modifying memory table directly by Kyösti Mälkki · 12 years ago
  100. cf8e466 Cleanup coreboot memory table includes by Kyösti Mälkki · 12 years ago