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1dcc170215f5c4116c04d05acd1328bb7962621b
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src
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soc
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intel
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cannonlake
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Kconfig
1dcc170
soc/intel/{cnl, icl}: Update the DCACHE_BSP_STACK_SIZE to 129KiB
by V Sowmya
· 4 years, 10 months ago
349b6a1
soc/intel/cannonlake: Allow coreboot to reserve stack for fsp
by Bora Guvendik
· 5 years ago
1d260e6
intel/fsp2_0: Add help text for FSP_TEMP_RAM_SIZE Kconfig
by Subrata Banik
· 5 years ago
5fffb5e
security/intel: Add TXT infrastructure
by Patrick Rudolph
· 5 years ago
0f5e01a
arch/x86: Flip option NO_CAR_GLOBAL_MIGRATION
by Kyösti Mälkki
· 5 years ago
9fc12e0
arch/x86: Enable POSTCAR_CONSOLE by default
by Kyösti Mälkki
· 5 years ago
0a4457f
lib/stage_cache: Refactor Kconfig options
by Kyösti Mälkki
· 5 years ago
ed9ea86
soc/intel/common/pch: Move thermal kconfig selection into common/pch
by Subrata Banik
· 5 years ago
f2ad8b3
soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake
by Aamir Bohra
· 5 years ago
810527a
soc/intel/cannonlake: Enable PCH Thermal Sensor configuration for S0ix
by Sumeet Pawnikar
· 5 years ago
7ed704d
soc/intel/{cnl,icl}: Always use CAR NEM enhanced by default
by Angel Pons
· 5 years ago
10a9432
soc/intel/common/timer: Move USE_LEGACY_8254_TIMER into common/block/timer
by Subrata Banik
· 5 years ago
b28b6b5
arch/x86: Flip HAVE_MONOTONIC_TIMER default
by Kyösti Mälkki
· 5 years ago
8abf66e
cpu/x86: Flip SMM_TSEG default
by Kyösti Mälkki
· 5 years ago
5ee4c12
soc/intel/cannonlake: Override PRERAM_CBMEM_CONSOLE_SIZE default value
by Subrata Banik
· 5 years ago
7803e48
soc/intel/cannonlake: Add support to log XHCI wake events
by Paul Fagerburg
· 5 years ago
a449290
Use 3rdparty/intel-microcode
by Arthur Heymans
· 5 years ago
85d3b40
soc/intel/cannonlake: fix use of legacy 8254 timer
by Matt DeVillier
· 5 years ago
c8db633
soc/intel/cannonlake/Kconfig: Don't have all variants select SOC_INTEL_CANNONLAKE
by Arthur Heymans
· 5 years ago
4821a0e
soc/intel/cannonlake: Rename SOC_INTEL_COMMON_CANNONLAKE_BASE
by Arthur Heymans
· 5 years ago
a0368a0
soc/intel/{cml, whl}: Add option to skip HECI disable in SMM
by Subrata Banik
· 5 years ago
9995418
soc/intel: Replace UART_BASE() and friends with a Kconfig
by Nico Huber
· 5 years ago
d5d89c8
soc/intel/cannonlake: Fix pcie clock number
by Lijian Zhao
· 5 years ago
939440c
soc/intel/cannonlake: Add GPIO dual-route support.
by Tim Wawrzynczak
· 5 years ago
6672bd8
vboot: refactor OPROM code
by Joel Kitching
· 5 years ago
73b0136
3rdparty/fsp: Update submodule pointer to upstream master
by Matt DeVillier
· 5 years ago
3717256
soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig
by Kane Chen
· 5 years ago
7f1a0e6
Revert "soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CML"
by Lijian Zhao
· 5 years ago
a432f38
soc/intel/cannonlake: Implement soc side VMX support
by Ronak Kanabar
· 5 years ago
41dad28
soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CML
by Subrata Banik
· 5 years ago
cef9879
soc/intel/cannonlake: Select FSP_M_XIP
by Furquan Shaikh
· 5 years ago
09b01de
soc/intel/cannonlake: Do not use XIP_ROM_SIZE
by Furquan Shaikh
· 5 years ago
fa011db
soc/intel/cannonlake: Add CometLake SoC support
by Subrata Banik
· 6 years ago
8aadab7
soc/intel/cannonlake: Add a config for configuring SD_VDD1_PWR_EN#
by Rizwan Qureshi
· 5 years ago
6527b1a
soc/intel/cannonlake: Add Whiskeylake SoC kconfig
by Subrata Banik
· 6 years ago
cff6a1d
soc/intel/cannonlake: Remove SOC_INTEL_CANNONLAKE_MEMCFG_INIT Kconfig
by Subrata Banik
· 6 years ago
f9154c5
soc/intel/cannonlake: Hook up Microcode
by Lijian Zhao
· 6 years ago
f5ca922
Untangle CBFS microcode updates
by Nico Huber
· 6 years ago
a96e66a
soc/intel: Clean mess around UART_DEBUG
by Nico Huber
· 6 years ago
695f2fe
soc/intel/cannonlake: Fix I2C clock input
by Duncan Laurie
· 6 years ago
11340e5
soc/intel/cannonlake: Increase bootblock size
by Duncan Laurie
· 6 years ago
c6382cd
soc/intel/*: Make FSP header path user configurable
by Patrick Georgi
· 6 years ago
b66757f
soc/intel: Consolidate FSP CAR setup and teardown code
by Praveen hodagatta pranesh
· 6 years ago
f677d17
intel: Use CF9 reset (part 2)
by Patrick Rudolph
· 6 years ago
dc4fceb
soc/intel/cannonlake: Enable HDA driver support
by praveen hodagatta pranesh
· 6 years ago
521e48c
soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions
by praveen hodagatta pranesh
· 6 years ago
e26c4a4
soc/intel/cannonlake: Add new cannon lake PCH-H support
by praveen hodagatta pranesh
· 6 years ago
6539e10
drivers/intel/fsp2_0: Hook up IntelFSP repo
by Patrick Georgi
· 6 years ago
2912e8e
soc/intel/denverton_ns: Enable common block PMC
by Julien Viard de Galbert
· 6 years ago
ef8b957
src/*/intel/: clarify Kconfig options regarding IFD
by Stefan Tauner
· 6 years ago
b2e56c1
soc/intel/cannonlake: Correct number of root ports for CNL PCH H
by Maulik V Vaghela
· 6 years ago
903c976
soc/intel/cannonlake: Change LPDDR4 to MEMCFG
by Lijian Zhao
· 6 years ago
3638a52
soc/intel/coffeelake: Add initial coffeelake support
by Lijian Zhao
· 6 years ago
918ff85
soc/intel/cannonlake: Disable UART_DEBUG by default
by Subrata Banik
· 6 years ago
29cc331
drivers/intel/gma: Unify VBT related Kconfig names
by Nico Huber
· 6 years ago
730df3c
arch/x86: Make RELOCATABLE_RAMSTAGE the default
by Kyösti Mälkki
· 8 years ago
c4986eb
soc/intel/common/block: Add common chip config block
by Subrata Banik
· 6 years ago
f513ceb
soc/intel/{cannonlake, skylake}: Select Gen-6 PCH binding for SKL/CNL
by Subrata Banik
· 6 years ago
e462585
soc/intel/cannonlake: Enable IDT and expection handling support for all stages
by Aamir Bohra
· 6 years ago
98376b8
soc/intel/cannonlake: Select common XHCI code
by Subrata Banik
· 6 years ago
160fbe5
soc/intel/cannonlake: Reduce STACK_SIZE to 4KiB
by Subrata Banik
· 6 years ago
e66600e
soc/intel/cannonlake: Add CONFIG_SMM_RESERVED_SIZE config
by Subrata Banik
· 6 years ago
dc23396
soc/intel/cannonlake: Include stage cache support for CNL
by Subrata Banik
· 6 years ago
c0257dd
ifdtool: Add a list of known platforms that support IFD_VERSION_2
by Furquan Shaikh
· 6 years ago
e09ba47
soc/intel/cannonlake: Set Cannonlake I2C clock
by Lijian Zhao
· 6 years ago
551e4be
soc/intel/common: prepare for lpss clock split
by Aaron Durbin
· 6 years ago
2410cd9
soc/intel/cannonlake: Limit xDCI feature when VBOOT is enabled
by Duncan Laurie
· 6 years ago
ac1cd44
soc/intel/cannonlake: Select SOC_AHCI_PORT_IMPLEMENTED_INVERT Kconfig for CNP-PCH
by Subrata Banik
· 7 years ago
7492bcb
soc/intel/cannonlake: Increase heap size
by John Zhao
· 7 years ago
a8733e3
soc/intel/cannonlake: CannonaLake make use of FVI information
by Subrata Banik
· 7 years ago
7455881
drivers/intel/fsp2_0: Unbind UDK2015 Kconfig from FSP2.0 driver
by Subrata Banik
· 7 years ago
4a1ee4b
mainboard/intel/cannonlake_rvp: Add support for MAX98373 speaker amp
by N, Harshapriya
· 7 years ago
0e956f2
soc/intel/cannonlake: Add audio NHLT support
by Lijian Zhao
· 7 years ago
9e3ba21
soc/intel/cannonlake: Add option to select FSP_CAR
by Subrata Banik
· 7 years ago
780a1c4
soc/intel/cannonlake: provide LPDDR4 memory init
by Nick Vaccaro
· 7 years ago
031020e
soc/intel/cannonlake: Correct PMC/GPIO routing information
by Lijian Zhao
· 7 years ago
a5bb716
soc/intel/cannonlake: Select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
by Furquan Shaikh
· 7 years ago
b8dc63b
ic2/designware: Move Intel i2c logic to shared driver
by Chris Ching
· 7 years ago
2b96f42
soc/intel/common/fast_spi: implement spi_flash_ctrlr_protect_region()
by Aaron Durbin
· 7 years ago
75c6f4a
soc/intel/cannonlake: Make use of Intel common Graphics block
by Subrata Banik
· 7 years ago
f388561
soc/intel/cannonlake: Define default LPSS clock
by Lijian Zhao
· 7 years ago
5a283ef
soc/intel/cannonlake: Make use of Intel SPI common block
by Subrata Banik
· 7 years ago
7b2d1ae
soc/intel/cannonlake: Add DSP support
by Lijian Zhao
· 7 years ago
9bb684a
soc/intel/cannonlake: Install common i2c
by Lijian Zhao
· 7 years ago
d2c6365
soc/intel/cannonlake: Use SCS common code
by Bora Guvendik
· 7 years ago
899f5ff
soc/intel/cannonlake: Use common p2sb driver
by Lijian Zhao
· 7 years ago
9b6384c
soc/intel/cannonlake: Increase stack size from 4KiB to 8KiB
by John Zhao
· 7 years ago
c85890d
soc/intel/cannonlake: Change max root port to 16
by Lijian Zhao
· 7 years ago
b0c4cbb
soc/intel/cannonlake: Add IGD Support and pre-OS display code
by Abhay Kumar
· 7 years ago
47569cf
soc/intel/cannonlake: Use EBDA area to store cbmem_top address
by Subrata Banik
· 7 years ago
0c8237a
soc/intel/cannonlake: Change default UART number to 2
by Lijian Zhao
· 7 years ago
a06f55b
soc/intel/cannonlake: Enable MRC cache
by Lijian Zhao
· 7 years ago
4a8f45f
soc/intel/cannonlake: reduce bootblock size
by Aaron Durbin
· 7 years ago
f0eb999
soc/intel/cannonlake: Fill the SMI usage
by Lijian Zhao
· 7 years ago
a515849
soc/intel/cannonlake: Add lpc pci driver
by Lijian Zhao
· 7 years ago
fcf8820
soc/intel/cannonlake: Add FSP GOP support
by Abhay kumar
· 7 years ago
2b074d9
soc/intel/cannonlake: Add common ACPI support for CNL
by Lijian Zhao
· 7 years ago
6d7063c
soc/intel/cannonlake: Add Vboot/ChromeOS support
by Lijian Zhao
· 7 years ago
c8c741d
soc/intel/cannonlake: Define Max PCIE Root Ports
by Pratik Prajapati
· 7 years ago
69b5cdb
soc/intel/cannonlake: add gpio files to make
by Nick Vaccaro
· 7 years ago
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