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review.coreboot.org / coreboot / 1cae45432e90488c2e9e9ce635fece26ca4c2268 / src / northbridge / intel / sandybridge / raminit.c
  1. 9e7806a usbdebug: Move ehci_debug_info allocation by Kyösti Mälkki · 11 years ago
  2. 24d1d4b x86: Unify arch/io.h and arch/romcc_io.h by Stefan Reinauer · 11 years ago
  3. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  4. 6fe0cab Extend CBFS to support arbitrary ROM source media. by Hung-Te Lin · 12 years ago
  5. 313ec9d Sandybridge: Set PEG clock gating by Marc Jones · 12 years ago
  6. 48a4a7f Provide MRC with a console printing callback function by Vadim Bendebury · 12 years ago
  7. c6b9f92 Add missing newline in error message by Stefan Reinauer · 12 years ago
  8. cf81b82 CMOS: Move MRC seed offset into upper bank by Duncan Laurie · 12 years ago
  9. d4ee808 sandybridge: reinitialize usbdebug after MRC by Sven Schnelle · 12 years ago
  10. 696262b More descriptive error messages in Sandybridge raminit code by Stefan Reinauer · 12 years ago
  11. 1244f4b Rework Sandybridge MRC cache handling by Stefan Reinauer · 12 years ago
  12. f125d80 Add missing newline to printk in Sandybridge init code by Stefan Reinauer · 12 years ago
  13. 7a3f36a Sandybridge: Display platform information early by Vadim Bendebury · 12 years ago
  14. 7b508dd Only send ME Dram Init Done message on Sandybridge by Duncan Laurie · 12 years ago
  15. 6ea86b1 Sandybridge: Temporarily disable MRC cache finding code by Stefan Reinauer · 12 years ago
  16. 00636b0 Add support for Intel Sandybridge CPU (northbridge part) by Stefan Reinauer · 12 years ago