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review.coreboot.org / coreboot / 17ad4598e9d3d302cc45c86a8e11aac62928c83c / src / northbridge / intel / pineview / northbridge.c
  1. 17ad459 nb/intel/*: Account for cbmem_top alignment by Arthur Heymans · 6 years ago
  2. 15e1b39 nb/intel/pineview: Don't use PCI operations on the pci_domain device by Arthur Heymans · 6 years ago
  3. a8a9f34 sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tables by Arthur Heymans · 7 years ago
  4. 3de3031 {mb,nb,soc}: Remove references to pci_bus_default_ops() by Nico Huber · 6 years ago
  5. 6275360 nb/intel/pineview: Get rid of device_t by Elyes HAOUAS · 6 years ago
  6. 3b633bb cpu/intel/pineview: Include speedstep by Arthur Heymans · 7 years ago
  7. 62e784b nb/intel/pineview: Move to early cbmem by Arthur Heymans · 7 years ago
  8. 6d0c65e nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h> by Arthur Heymans · 8 years ago
  9. 32a38ee intel/pineview: Do not use scratchpad register for ACPI S3 by Kyösti Mälkki · 8 years ago
  10. 4dc680a nb/intel/pineview/northbridge.c: Remove legacy_hole_size_k declaration by Jonathan Neuschäfer · 8 years ago
  11. 51fdb92 nb/intel/pineview: Native VGA init (CRT) by Damien Zammit · 8 years ago
  12. 02f4764 nb/intel/pineview: Use macro names for memory base registers by Damien Zammit · 8 years ago
  13. f7060f1 northbridge/intel/pineview: Add remaining boilerplate code for northbridge by Damien Zammit · 9 years ago