1. 0cb07e3 include: Fix spelling by Martin Roth · 11 years ago
  2. 5ce0506 AMD Fam15tn: Add support for AGESA runtime allocation in CBMEM by Rudolf Marek · 11 years ago
  3. 716738a x86: add cache-as-ram migration option by Aaron Durbin · 11 years ago
  4. 243aa44 boot: remove cbmem_post_handling() by Aaron Durbin · 11 years ago
  5. 40131cf cbmem: use boot state machine by Aaron Durbin · 11 years ago
  6. 9c07c8f lynxpoint: Move ACPI NVS into separate CBMEM table by Duncan Laurie · 11 years ago
  7. 0c6946d cbmem: add vboot cmbem id by Aaron Durbin · 11 years ago
  8. dd4a6d2 coreboot: dynamic cbmem requirement by Aaron Durbin · 11 years ago
  9. df3a109 cbmem: dynamic cbmem support by Aaron Durbin · 11 years ago
  10. 25fe2d0 ramstage: Add cbmem_get_table_location() by Aaron Durbin · 12 years ago
  11. 8e4a355 coreboot: introduce CONFIG_RELOCATABLE_RAMSTAGE by Aaron Durbin · 12 years ago
  12. a1db81b4 cbmem: add CBMEM_ID_ROMSTAGE_INFO id by Aaron Durbin · 12 years ago
  13. d37ab45 Implement GCC code coverage analysis by Stefan Reinauer · 12 years ago
  14. 11290c4 SMM: Restore GNVS pointer in the resume path by Duncan Laurie · 12 years ago
  15. 215f2785 ELOG: Support for non-memory mapped flash by Duncan Laurie · 12 years ago
  16. bb11e60 Hook up MRC cache update by Stefan Reinauer · 12 years ago
  17. f722373 S3 code in coreboot public folder. by zbao · 12 years ago
  18. 61f4a74 Add constants for fast path resume copying by Stefan Reinauer · 12 years ago
  19. be25a4d CBMEM CONSOLE: Add CBMEM type for console buffer. by Vadim Bendebury · 13 years ago
  20. f2f9386 Increase CBMEM to accommodate larger console. by Vadim Bendebury · 13 years ago
  21. 6f72d69 Add timestamp collecting to coreboot. by Vadim Bendebury · 13 years ago
  22. e186060 Initialize CBMEM early. by Vadim Bendebury · 13 years ago
  23. 294edb2 Increase size of the coreboot table area by Stefan Reinauer · 13 years ago
  24. 164bcfd Add automatic SMBIOS table generation by Sven Schnelle · 13 years ago
  25. 475916d Compile cbmem.c instead of including it in romstage, by Rudolf Marek · 14 years ago
  26. 97be27e We hardcode highmemory size in every northbridge! This is bad, and especially if suspend to ram is involved. Let the default be taken from cbmem.h which also handles the suspend logic. by Rudolf Marek · 14 years ago
  27. 3310934 Following patch makes just one fadt.c file. For SB700. by Rudolf Marek · 14 years ago
  28. bcaea14 1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_ACPI_RESUME == 1 getting rid of ugly define in romstage.c by Rudolf Marek · 14 years ago
  29. ea92185 Add few missing prototypes, and remove few unused (thus lonelly) variables. by Maciej Pijanka · 15 years ago
  30. 3b31402 by Stefan Reinauer · 15 years ago