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review.coreboot.org / coreboot / 076915955fa3bf05a1c324327827522063b9f757 / src / include / device / dram / ddr3.h
  1. 0769159 src/device/dram/ddr3: Parse additional information by Patrick Rudolph · 8 years ago
  2. 9f3f915 nb/intel/sandybridge/romstage: Read fuse bits for max MEM Clk by Patrick Rudolph · 9 years ago
  3. bd1fdc6 nb/intel/sandybridge/raminit: Add XMP support by Patrick Rudolph · 9 years ago
  4. fd277d8 header files: Fix guard name comments to match guard names by Martin Roth · 9 years ago
  5. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  6. c4e49f6 Change #ifdef and #if defined CONFIG_ bools to #if IS_ENABLED() by Martin Roth · 9 years ago
  7. 1e2500e device: DDR3 generic code 64bit fix by Stefan Reinauer · 9 years ago
  8. 0e675f7 ddr3: Plumber DIMM type to parsed structure. by Vladimir Serbinenko · 10 years ago
  9. 7686a56 sandy/ivybridge: Native raminit. by Vladimir Serbinenko · 10 years ago
  10. 4c37e58 device/dram/ddr3: Move CRC calculation in a separate function by Alexandru Gagniuc · 11 years ago
  11. 0cb07e3 include: Fix spelling by Martin Roth · 11 years ago
  12. 78706fd DDR3: Add utilities for creating MRS commands by Alexandru Gagniuc · 11 years ago
  13. f97ff3f dram: Add utilities for decoding DDR3 SPDs by Alexandru Gagniuc · 11 years ago