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Stefan Reinauere11835e2011-10-31 12:54:00 -07001/*
Stefan Reinauere11835e2011-10-31 12:54:00 -07002 *
3 * Copyright (C) 2010 coresystems GmbH
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#ifndef _PCI_PCI_H
30#define _PCI_PCI_H
31
32/* we implement at least this version */
33#define PCI_LIB_VERSION 0x020200
34
35#include <pci.h>
36
Stefan Tauner9090ff92013-08-25 12:35:09 +020037#define PCI_REVISION_ID REG_REVISION_ID
38#define PCI_CLASS_PROG REG_PROG_IF
Nico Huberc95f2f52012-12-07 15:45:10 +010039#define PCI_CLASS_DEVICE REG_SUBCLASS
Stefan Reinauere11835e2011-10-31 12:54:00 -070040#define PCI_SUBSYSTEM_VENDOR_ID REG_SUBSYS_VENDOR_ID
41#define PCI_SUBSYSTEM_ID REG_SUBSYS_ID
42
43#define PCI_COMMAND REG_COMMAND
44#define PCI_COMMAND_IO REG_COMMAND_IO
45#define PCI_COMMAND_MEMORY REG_COMMAND_MEM
46#define PCI_COMMAND_MASTER REG_COMMAND_BM
47
48#define PCI_HEADER_TYPE REG_HEADER_TYPE
49#define PCI_HEADER_TYPE_NORMAL HEADER_TYPE_NORMAL
50#define PCI_HEADER_TYPE_BRIDGE HEADER_TYPE_BRIDGE
51#define PCI_HEADER_TYPE_CARDBUS HEADER_TYPE_CARDBUS
52
53#define PCI_BASE_ADDRESS_0 0x10
54#define PCI_BASE_ADDRESS_1 0x14
55#define PCI_BASE_ADDRESS_2 0x18
56#define PCI_BASE_ADDRESS_3 0x1c
57#define PCI_BASE_ADDRESS_4 0x20
58#define PCI_BASE_ADDRESS_5 0x24
59#define PCI_BASE_ADDRESS_SPACE 1 // mask
60#define PCI_BASE_ADDRESS_SPACE_IO 1
61#define PCI_BASE_ADDRESS_SPACE_MEM 0
Furquan Shaikh49f7dd92016-06-19 23:22:26 -070062#define PCI_BASE_ADDRESS_MEM_MASK ~0xf
63#define PCI_BASE_ADDRESS_IO_MASK ~0x3
Stefan Reinauere11835e2011-10-31 12:54:00 -070064
65#define PCI_ROM_ADDRESS 0x30
66#define PCI_ROM_ADDRESS1 0x38 // on bridges
67#define PCI_ROM_ADDRESS_MASK ~0x7ff
68
Felix Singerb4b73d42020-10-14 18:44:49 +020069#define PCI_CLASS_STORAGE_AHCI 0x0106
Thomas Heijligenfffc21d2019-07-10 16:05:36 +020070#define PCI_CLASS_STORAGE_NVME 0x0108
Nico Huberabc69cd2017-08-01 12:15:04 +020071#define PCI_CLASS_MEMORY_OTHER 0x0580
72
Stefan Reinauere11835e2011-10-31 12:54:00 -070073#define PCI_VENDOR_ID_INTEL 0x8086
74
75struct pci_dev {
76 u16 domain;
77 u8 bus, dev, func;
78 u16 vendor_id, device_id;
Felix Singer4c9622a2020-10-13 18:00:24 +020079 u16 device_class;
Stefan Reinauere11835e2011-10-31 12:54:00 -070080 struct pci_dev *next;
81};
82
83/*
84 * values to match devices against.
85 * "-1" means "don't care", everything else requires an exact match
86 */
87struct pci_filter {
88 int domain, bus, dev, func;
89 int vendor, device;
90 struct pci_dev *devices;
91};
92
Nico Huber47926892017-07-26 14:34:09 +020093enum pci_access_type { /* dummy for code compatibility */
94 PCI_ACCESS_AUTO,
95 PCI_ACCESS_I386_TYPE1,
96 PCI_ACCESS_MAX
97};
98
Stefan Reinauere11835e2011-10-31 12:54:00 -070099struct pci_access {
Nico Huber47926892017-07-26 14:34:09 +0200100 unsigned int method; /* dummy for code compatibility */
Stefan Reinauere11835e2011-10-31 12:54:00 -0700101 struct pci_dev *devices;
102};
103
104u8 pci_read_byte(struct pci_dev *dev, int pos);
105u16 pci_read_word(struct pci_dev *dev, int pos);
106u32 pci_read_long(struct pci_dev *dev, int pos);
107
108int pci_write_byte(struct pci_dev *dev, int pos, u8 data);
109int pci_write_word(struct pci_dev *dev, int pos, u16 data);
110int pci_write_long(struct pci_dev *dev, int pos, u32 data);
111
112struct pci_access *pci_alloc(void);
113void pci_init(struct pci_access*);
114void pci_cleanup(struct pci_access*);
115char *pci_filter_parse_slot(struct pci_filter*, const char*);
116int pci_filter_match(struct pci_filter*, struct pci_dev*);
117void pci_filter_init(struct pci_access*, struct pci_filter*);
118void pci_scan_bus(struct pci_access*);
119struct pci_dev *pci_get_dev(struct pci_access*, u16, u8, u8, u8);
Nico Huber47926892017-07-26 14:34:09 +0200120void pci_free_dev(struct pci_dev *);
Stefan Reinauere11835e2011-10-31 12:54:00 -0700121
122#endif