Uwe Hermann | 0120e1a | 2007-09-16 18:11:03 +0000 | [diff] [blame] | 1 | /* |
Uwe Hermann | afe8309 | 2007-09-28 15:45:43 +0000 | [diff] [blame] | 2 | * This file is part of the superiotool project. |
Uwe Hermann | 0120e1a | 2007-09-16 18:11:03 +0000 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2006 coresystems GmbH <info@coresystems.de> |
Uwe Hermann | ebb73f2 | 2008-11-12 19:08:58 +0000 | [diff] [blame] | 5 | * Copyright (C) 2007-2008 Uwe Hermann <uwe@hermann-uwe.de> |
Edward O'Callaghan | 5b5f834 | 2014-01-26 00:19:58 +1100 | [diff] [blame] | 6 | * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com> |
Uwe Hermann | 0120e1a | 2007-09-16 18:11:03 +0000 | [diff] [blame] | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
Paul Menzel | a46a712 | 2013-02-23 18:37:27 +0100 | [diff] [blame] | 20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Uwe Hermann | 0120e1a | 2007-09-16 18:11:03 +0000 | [diff] [blame] | 21 | */ |
| 22 | |
| 23 | #include "superiotool.h" |
| 24 | |
Uwe Hermann | 0702469 | 2007-09-20 22:13:48 +0000 | [diff] [blame] | 25 | #define DEVICE_ID_BYTE1_REG 0x20 |
| 26 | #define DEVICE_ID_BYTE2_REG 0x21 |
Uwe Hermann | 945045b | 2007-09-28 15:39:10 +0000 | [diff] [blame] | 27 | |
Uwe Hermann | 0702469 | 2007-09-20 22:13:48 +0000 | [diff] [blame] | 28 | #define VENDOR_ID_BYTE1_REG 0x23 |
| 29 | #define VENDOR_ID_BYTE2_REG 0x24 |
| 30 | |
Uwe Hermann | 6b4ad43 | 2007-09-23 13:17:29 +0000 | [diff] [blame] | 31 | #define FINTEK_VENDOR_ID 0x3419 |
| 32 | |
Uwe Hermann | 246be7d | 2007-10-31 22:22:11 +0000 | [diff] [blame] | 33 | static const struct superio_registers reg_table[] = { |
Uwe Hermann | ebb73f2 | 2008-11-12 19:08:58 +0000 | [diff] [blame] | 34 | {0x0106, "F71862FG / F71863FG", { /* Same ID? Datasheet typo? */ |
Arjan Koers | 78fdd60 | 2009-06-26 15:16:21 +0000 | [diff] [blame] | 35 | /* We assume reserved bits are read as 0. */ |
| 36 | {NOLDN, NULL, |
| 37 | {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a, |
| 38 | 0x2b,0x2c,0x2d,EOT}, |
| 39 | {0x06,0x01,0x19,0x34,0x00,0x00,MISC,0x00,0x00,0x00, |
| 40 | 0x00,0x00,0x08,EOT}}, |
Uwe Hermann | 4bdd643 | 2010-05-14 16:40:55 +0000 | [diff] [blame] | 41 | {0x0, "Floppy", |
Arjan Koers | 78fdd60 | 2009-06-26 15:16:21 +0000 | [diff] [blame] | 42 | {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT}, |
| 43 | {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}}, |
Uwe Hermann | 4bdd643 | 2010-05-14 16:40:55 +0000 | [diff] [blame] | 44 | {0x1, "COM1", |
Arjan Koers | 78fdd60 | 2009-06-26 15:16:21 +0000 | [diff] [blame] | 45 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 46 | {0x01,0x03,0xf8,0x04,0x00,EOT}}, |
Uwe Hermann | 4bdd643 | 2010-05-14 16:40:55 +0000 | [diff] [blame] | 47 | {0x2, "COM2", |
Arjan Koers | 78fdd60 | 2009-06-26 15:16:21 +0000 | [diff] [blame] | 48 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 49 | {0x01,0x02,0xf8,0x03,0x00,0x00,EOT}}, |
| 50 | {0x3, "Parallel port", |
| 51 | {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, |
| 52 | {0x01,0x03,0x78,0x07,0x03,0x42,EOT}}, |
| 53 | {0x4, "Hardware monitor", |
| 54 | {0x30,0x60,0x61,0x70,EOT}, |
| 55 | {0x01,0x02,0x95,0x00,EOT}}, |
| 56 | {0x5, "Keyboard", |
| 57 | {0x30,0x60,0x61,0x70,0x72,EOT}, |
| 58 | {0x01,0x00,0x60,0x00,0x00,EOT}}, |
| 59 | {0x6, "GPIO", |
| 60 | {0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1, |
| 61 | 0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3, |
| 62 | EOT}, |
| 63 | {0x00,0x0f,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff, |
| 64 | NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0x3f,NANA,0x00, |
| 65 | EOT}}, |
| 66 | {0x7, "VID", |
| 67 | {0x30,0x60,0x61, 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6, |
| 68 | 0xf7,EOT}, |
| 69 | {0x00,0x00,0x00, 0x00,0x00,MISC,0x00,NANA,0x00,0x00, |
| 70 | 0x00,EOT}}, |
| 71 | {0x8, "SPI", |
| 72 | {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa, |
| 73 | 0xfb,0xfc,0xfd,0xfe,0xff,EOT}, |
| 74 | {0x10,0x04,0x01,NANA,0x00,0x00,0x00,NANA,0x00,0x00, |
| 75 | 0x00,0x00,0x00,0x00,0x00,EOT}}, |
| 76 | {0xa, "PME, ACPI", |
| 77 | {0x30,0xf0,0xf1,0xf4,0xf5,0xf7,EOT}, |
| 78 | {0x00,0x00,NANA,0x06,0x1c,0x01,EOT}}, |
Uwe Hermann | 945045b | 2007-09-28 15:39:10 +0000 | [diff] [blame] | 79 | {EOT}}}, |
Edward O'Callaghan | 5b5f834 | 2014-01-26 00:19:58 +1100 | [diff] [blame] | 80 | {0x0710, "F71869AD", { |
| 81 | /* We assume reserved bits are read as 0. */ |
| 82 | {NOLDN, NULL, |
| 83 | {0x02,0x07,0x20,0x21,0x25,0x26,0x27,0x28,0x29,0x2a, |
| 84 | 0x2b,0x2c,0x2d,EOT}, |
| 85 | {0x00,0x00,0x08,0x14,0x00,0x00,MISC,0x38,0x6f,0x07, |
| 86 | 0x0f,0x00,0x28,EOT}}, |
| 87 | {0x0, "Floppy", |
| 88 | {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT}, |
| 89 | {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}}, |
| 90 | {0x1, "COM1", |
| 91 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 92 | {0x01,0x03,0xf8,0x04,0x00,EOT}}, |
| 93 | {0x2, "COM2", |
| 94 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 95 | {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}}, |
| 96 | {0x3, "Parallel port", |
| 97 | {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, |
| 98 | {0x01,0x03,0x78,0x07,0x03,0x42,EOT}}, |
| 99 | {0x4, "Hardware monitor", |
| 100 | {0x30,0x60,0x61,0x70,EOT}, |
| 101 | {0x01,0x02,0x95,0x00,EOT}}, |
| 102 | {0x5, "Keyboard", |
| 103 | {0x30,0x60,0x61,0x70,0x72,0xf0,0xfe,0xff,EOT}, |
| 104 | {0x01,0x00,0x60,0x01,0x0c,0x83,0x81,0x29,EOT}}, |
| 105 | {0x6, "GPIO", |
| 106 | {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1, |
| 107 | 0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0, |
| 108 | 0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3, |
| 109 | 0x90,0x91,0x92,0x93,EOT}, |
| 110 | {0x00,0x00,0x00,0x00,0x00,0x3f,NANA,0x00,0x00,0xff, |
| 111 | NANA,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,0x00, |
| 112 | 0xff,NANA,0x00,0x0f,NANA,0x00,0x00,0x1f,NANA,0x00, |
| 113 | 0x00,0x3f,NANA,0x00,EOT}}, |
| 114 | {0x7, "BSEL", |
| 115 | {0x30,0x60,0x61,0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT}, |
| 116 | {0x00,0x00,0x00,0x01,0x00,0x00,NANA,0x00,0x0a,0x00,EOT}}, |
| 117 | {0xa, "PME, ACPI", |
| 118 | {0x30,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfe,0xff,EOT}, |
| 119 | {0x00,0x00,0x00,NANA,NANA,0x06,0x1c,0x1f,0x86,0x00,0x00,0x00,0x00,EOT}}, |
| 120 | {EOT}}}, |
David Hendricks | b97030d | 2010-11-29 11:56:39 +0000 | [diff] [blame] | 121 | {0x2307, "F71889", { |
| 122 | /* We assume reserved bits are read as 0. */ |
| 123 | {NOLDN, NULL, |
| 124 | {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x2a,0x2b, |
| 125 | 0x2c,0x2d,EOT}, |
| 126 | {0x07,0x23,0x19,0x34,0x00,0x00,0x00,0x00,0xf0,0x30, |
| 127 | 0x00,0x08,EOT}}, |
| 128 | {0x0, "Floppy", |
| 129 | {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT}, |
| 130 | {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}}, |
| 131 | {0x1, "COM1", |
| 132 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 133 | {0x01,0x03,0xf8,0x04,0x00,EOT}}, |
| 134 | {0x2, "COM2", |
| 135 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 136 | {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}}, |
| 137 | {0x3, "Parallel port", |
| 138 | {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, |
| 139 | {0x01,0x03,0x78,0x07,0x03,0x42,EOT}}, |
| 140 | {0x4, "Hardware monitor", |
| 141 | {0x30,0x60,0x61,0x70,EOT}, |
| 142 | {0x01,0x02,0x95,0x00,EOT}}, |
| 143 | {0x5, "Keyboard", |
| 144 | {0x30,0x60,0x61,0x70,0x72,0xfe,EOT}, |
| 145 | {0x01,0x00,0x60,0x01,0x0c,0x81,EOT}}, |
| 146 | {0x6, "GPIO", |
| 147 | {0x80,0x81,0x82,0x83,0x90,0x91,0x92,0x93,0xa0,0xa1, |
| 148 | 0xa2,0xa3,0xb0,0xb1,0xb2,0xc0,0xc1,0xc2,0xc3,0xd0, |
| 149 | 0xd1,0xd2,0xd3,0xe0,0xe1,0xe2,0xe3,0xf0,0xf1,0xf2, |
| 150 | 0xf3,0xfe,0xff,EOT}, |
| 151 | {0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0x1f, |
| 152 | NANA,0x00,0x00,0xff,NANA,0x00,0xff,NANA,0x00,0x00, |
| 153 | 0xff,NANA,0x00,0x00,0x7f,NANA,0x00,0x00,0x7f,NANA, |
| 154 | 0x00,0x00,0x00,EOT}}, |
| 155 | {0x7, "VID", |
| 156 | {0x30,0x60,0x61,EOT}, |
| 157 | {0x00,0x00,0x00,EOT}}, |
| 158 | {0x8, "SPI", |
| 159 | {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa, |
| 160 | 0xfb,0xfc,0xfd,0xfe,0xff,EOT}, |
| 161 | {0x00,RSVD,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 162 | 0x00,0x00,0x00,0x00,0x00,EOT}}, |
| 163 | {0xa, "PME, ACPI", |
| 164 | {0x30,0xf0,0xf1,0xf4,0xf5,0xf6,EOT}, |
| 165 | {0x00,0x00,0x00,0x26,0x1c,0x07,EOT}}, |
| 166 | {0xb, "VREF", |
| 167 | {0xf0,0xf1,0xf2,0xf3,0xff,EOT}, |
| 168 | {0x64,0x64,0x64,0x00,0x00,EOT}}, |
| 169 | {EOT}}}, |
Uwe Hermann | 945045b | 2007-09-28 15:39:10 +0000 | [diff] [blame] | 170 | {0x4103, "F71872F/FG / F71806F/FG", { /* Same ID? Datasheet typo? */ |
Jonathan Kollasch | d74c774 | 2010-10-24 12:43:41 +0000 | [diff] [blame] | 171 | {NOLDN, NULL, |
| 172 | {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28, |
| 173 | 0x29,0x2a,0x2b,0x2c,0x2d,EOT}, |
| 174 | {0x03,0x41,RSVD,0x19,0x34,0x00,0x00,MISC,0x66, |
| 175 | 0x80,0x00,0x00,0x00,0x04,EOT}}, |
| 176 | {0x0, "Floppy", |
| 177 | {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT}, |
| 178 | {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}}, |
| 179 | {0x1, "COM1", |
| 180 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 181 | {0x01,0x03,0xf8,0x04,0x00,EOT}}, |
| 182 | {0x2, "COM2", |
| 183 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 184 | {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}}, |
| 185 | {0x3, "Parallel port", |
| 186 | {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, |
| 187 | {0x01,0x03,0x78,0x07,0x03,0x42,EOT}}, |
| 188 | {0x4, "Hardware monitor", |
| 189 | {0x30,0x60,0x61,0x70,EOT}, |
| 190 | {0x00,0x02,0x95,0x00,EOT}}, |
Uwe Hermann | 7015989 | 2010-10-24 14:19:09 +0000 | [diff] [blame] | 191 | {0x5, "Keyboard", /* Only documented on F71872F/FG. */ |
Jonathan Kollasch | d74c774 | 2010-10-24 12:43:41 +0000 | [diff] [blame] | 192 | {0x30,0x60,0x61,0x70,0x72,0xf0,0xf1,EOT}, |
| 193 | {0x01,0x00,0x60,0x00,0x00,0x83,0x00,EOT}}, |
| 194 | {0x6, "GPIO", |
| 195 | {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8, |
| 196 | 0xe9,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8, |
| 197 | EOT}, |
| 198 | {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00, |
| 199 | 0x7f,0x00,0x7f,NANA,0x00,0xff,NANA,0x00,0x03,NANA, |
| 200 | EOT}}, |
| 201 | {0x7, "VID", |
| 202 | {0x30,0x60,0x61,EOT}, |
| 203 | {0x00,0x00,0x00,EOT}}, |
| 204 | {0xa, "PME, ACPI", |
| 205 | {0x30,0xf0,0xf1,0xf4,0xf5,EOT}, |
| 206 | {0x00,0x00,0x61,0x06,0x3c,EOT}}, |
Uwe Hermann | 945045b | 2007-09-28 15:39:10 +0000 | [diff] [blame] | 207 | {EOT}}}, |
| 208 | {0x4105, "F71882FG/F71883FG", { /* Same ID? Datasheet typo? */ |
Uwe Hermann | 0323a2b | 2008-10-09 23:56:11 +0000 | [diff] [blame] | 209 | /* We assume reserved bits are read as 0. */ |
| 210 | {NOLDN, NULL, |
| 211 | {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a, |
| 212 | 0x2b,0x2c,0x2d,EOT}, |
| 213 | {0x05,0x41,0x19,0x34,0x00,0x00,0x00,0x00,0x00,0x00, |
| 214 | 0x00,0x08,0x08,EOT}}, |
| 215 | {0x0, "Floppy", |
| 216 | {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT}, |
| 217 | {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}}, |
| 218 | {0x1, "COM1", |
| 219 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 220 | {0x01,0x03,0xf8,0x04,0x00,EOT}}, |
| 221 | {0x2, "COM2", |
| 222 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 223 | {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}}, |
| 224 | {0x3, "Parallel port", |
| 225 | {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, |
| 226 | {0x01,0x03,0x78,0x07,0x03,0x42,EOT}}, |
| 227 | {0x4, "Hardware monitor", |
| 228 | {0x30,0x60,0x61,0x70,EOT}, |
| 229 | {0x01,0x02,0x95,0x00,EOT}}, |
| 230 | {0x5, "Keyboard", |
| 231 | {0x30,0x60,0x61,0x70,0x72,0xf0,EOT}, |
| 232 | {0x01,0x00,0x60,0x00,0x00,0x83,EOT}}, |
| 233 | {0x6, "GPIO", |
| 234 | {0x70,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,0xd2,0xd3,0xc0, |
| 235 | 0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xf0,0xf1,0xf2, |
| 236 | 0xf3,EOT}, |
| 237 | {0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00, |
| 238 | 0x0f,NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0xff,NANA, |
| 239 | 0x00,EOT}}, |
| 240 | {0x7, "VID", |
| 241 | {0x30,0x60,0x61,EOT}, |
| 242 | {0x00,0x00,0x00,EOT}}, |
| 243 | {0x7, "SPI", |
| 244 | {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa, |
| 245 | 0xfb,0xfc,0xfd,0xfe,0xff,EOT}, |
| 246 | {0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 247 | 0x00,0x00,0x00,0x00,0x00,EOT}}, |
| 248 | {0xa, "PME, ACPI", |
| 249 | {0x30,0xf0,0xf1,0xf4,0xf5,EOT}, |
| 250 | {0x00,0x00,0x01,0x06,0x1c,EOT}}, |
Uwe Hermann | 945045b | 2007-09-28 15:39:10 +0000 | [diff] [blame] | 251 | {EOT}}}, |
| 252 | {0x0604, "F71805F/FG", { |
Uwe Hermann | e0ffaa1 | 2007-09-26 15:48:09 +0000 | [diff] [blame] | 253 | /* We assume reserved bits are read as 0. */ |
| 254 | {NOLDN, NULL, |
Uwe Hermann | b0ae976 | 2008-10-14 16:34:38 +0000 | [diff] [blame] | 255 | {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,EOT}, |
| 256 | {0x04,0x06,0x19,0x34,0x00,0x00,0x3f,0x08,0x00,EOT}}, |
Uwe Hermann | e0ffaa1 | 2007-09-26 15:48:09 +0000 | [diff] [blame] | 257 | {0x0, "Floppy", |
| 258 | {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT}, |
| 259 | {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}}, |
| 260 | {0x1, "COM1", |
| 261 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 262 | {0x01,0x03,0xf8,0x04,0x00,EOT}}, |
| 263 | {0x2, "COM2", |
| 264 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 265 | {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}}, |
| 266 | {0x3, "Parallel port", |
| 267 | {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, |
| 268 | {0x01,0x03,0x78,0x07,0x03,0x42,EOT}}, |
| 269 | {0x4, "Hardware monitor", |
| 270 | {0x30,0x60,0x61,0x70,EOT}, |
| 271 | {0x00,0x02,0x95,0x00,EOT}}, |
| 272 | {0x6, "GPIO", |
| 273 | {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8, |
| 274 | 0xe9,0xf0,0xf1,0xf3,0xf4,EOT}, |
| 275 | {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00, |
| 276 | 0x00,0x00,NANA,0x00,NANA,EOT}}, |
| 277 | {0xa, "PME", |
| 278 | {0x30,0xf0,0xf1,EOT}, |
| 279 | {0x00,0x00,0x00,EOT}}, |
Uwe Hermann | 0702469 | 2007-09-20 22:13:48 +0000 | [diff] [blame] | 280 | {EOT}}}, |
Uwe Hermann | cfb6ac7 | 2008-10-01 20:16:58 +0000 | [diff] [blame] | 281 | {0x0581, "F8000", { /* Fintek/ASUS F8000 */ |
| 282 | {EOT}}}, |
Stefan Reinauer | e7b7ae2 | 2010-08-17 08:24:01 +0000 | [diff] [blame] | 283 | {0x0802, "F81216D/DG", { |
| 284 | {NOLDN, NULL, |
| 285 | {0x25,0x2f,EOT}, |
| 286 | {0x00,RSVD,EOT}}, |
| 287 | {0x0, "UART1", |
| 288 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 289 | {NANA,NANA,NANA,NANA,0x00,0x40,EOT}}, |
| 290 | {0x1, "UART2", |
| 291 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 292 | {NANA,NANA,NANA,NANA,0x00,EOT}}, |
| 293 | {0x2, "UART3", |
| 294 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 295 | {NANA,NANA,NANA,NANA,0x00,EOT}}, |
| 296 | {0x3, "UART4", |
| 297 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 298 | {NANA,NANA,NANA,NANA,0x00,EOT}}, |
| 299 | {0x8, "WDT", |
| 300 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 301 | {0x00,NANA,NANA,NANA,NANA,NANA,EOT}}, |
| 302 | {EOT}}}, |
| 303 | {0x1602, "F81216AD", { |
| 304 | {NOLDN, NULL, |
| 305 | {0x25,0x27,EOT}, |
| 306 | {0x00,NANA,EOT}}, |
| 307 | {0x0, "UART1", |
| 308 | {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf4,0xf5,EOT}, |
| 309 | {NANA,NANA,NANA,NANA,0x00,0x40,0x00,0x00,EOT}}, |
| 310 | {0x1, "UART2", |
| 311 | {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT}, |
| 312 | {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}}, |
| 313 | {0x2, "UART3", |
| 314 | {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT}, |
| 315 | {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}}, |
| 316 | {0x3, "UART4", |
| 317 | {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT}, |
| 318 | {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}}, |
| 319 | {0x8, "WDT", |
| 320 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 321 | {0x00,NANA,NANA,NANA,NANA,NANA,EOT}}, |
| 322 | {EOT}}}, |
Zheng Bao | 0e40e6b | 2010-11-05 00:34:12 +0000 | [diff] [blame] | 323 | {0x0407, "F81865F/F-I", { |
Stefan Tauner | e54995a | 2012-09-06 10:38:49 +0200 | [diff] [blame] | 324 | {NOLDN, NULL, |
| 325 | {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a-1,0x2a-2,0x2b,0x2c,0x2d,EOT}, |
| 326 | {NANA,0x00,0x07,0x04,0x19,0x34,NANA,NANA,NANA,0x00,0x00,0x00,0x00,0x1f,0x00,0x08,EOT}}, |
| 327 | {0x00, "FDC", |
| 328 | {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT}, |
| 329 | {NANA,0x03,0xf0,NANA,NANA,NANA,NANA,NANA,EOT}}, |
| 330 | {0x03, "LPT", |
| 331 | {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, |
| 332 | {NANA,0x03,0x78,NANA,NANA,NANA,EOT}}, |
| 333 | {0x04, "HWMON", |
| 334 | {0x30,0x60,0x61,0x70,EOT}, |
| 335 | {NANA,0x02,0x95,NANA,EOT}}, |
| 336 | {0x05, "KBC", |
| 337 | {0x30,0x60,0x61,0x70,0x72,0xfe,0xf0,EOT}, |
| 338 | {NANA,0x00,0x60,NANA,NANA,NANA,0x71,EOT}}, |
| 339 | {0x06, "GPIO", |
| 340 | {0x30,0x60,0x61,0x70,0xf1,0xf2,0xf3,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xe0,0xe1,0xe2,0xe3,0xef,0xd0,0xd1,0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,0x90,0x91,0x92,0x93,EOT}, |
| 341 | {NANA,0x00,0x60,NANA,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,NANA,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,NANA,NANA,NANA,NANA,EOT}}, |
| 342 | {0x07, "WDT", |
| 343 | {0x30,0x60,0x61,0xf5,0xf6,0xfa,EOT}, |
| 344 | {NANA,0x00,0x00,0x00,0x00,NANA,EOT}}, |
| 345 | {0x08, "SPI", |
| 346 | {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,0xfb,0xfc,0xfd,0xfe,0xff,EOT}, |
| 347 | {0x10,0x04,NANA,NANA,0x00,0x00,NANA,NANA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}}, |
| 348 | {0x0a, "PME & ACPI", |
| 349 | {0x30,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,EOT}, |
| 350 | {NANA,NANA,NANA,NANA,NANA,0x06,NANA,0x00,EOT}}, |
| 351 | {0x0b, "RTC", |
| 352 | {0x30,0x60,0x61,0x70,EOT}, |
| 353 | {NANA,0x00,0x00,NANA,EOT}}, |
| 354 | {0x10, "UART1", |
| 355 | {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT}, |
| 356 | {NANA,0x03,0xf8,NANA,NANA,NANA,0x00,0x00,EOT}}, |
| 357 | {0x11, "UART2", |
| 358 | {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT}, |
| 359 | {NANA,0x02,0xf8,NANA,NANA,NANA,0x00,0x00,EOT}}, |
| 360 | {0x12, "UART3", |
| 361 | {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT}, |
| 362 | {NANA,0x03,0xe8,NANA,NANA,NANA,0x00,0x00,EOT}}, |
| 363 | {0x13, "UART4", |
| 364 | {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT}, |
| 365 | {NANA,0x02,0xe8,NANA,NANA,NANA,0x00,0x00,EOT}}, |
| 366 | {0x14, "UART5", |
| 367 | {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT}, |
| 368 | {NANA,0x00,0x00,NANA,NANA,NANA,0x00,0x00,EOT}}, |
| 369 | {0x15, "UART6", |
| 370 | {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT}, |
| 371 | {NANA,0x00,0x00,NANA,NANA,NANA,0x00,0x00,EOT}}, |
Zheng Bao | 0e40e6b | 2010-11-05 00:34:12 +0000 | [diff] [blame] | 372 | {EOT}}}, |
Uwe Hermann | 0702469 | 2007-09-20 22:13:48 +0000 | [diff] [blame] | 373 | {EOT} |
| 374 | }; |
| 375 | |
Uwe Hermann | 25a6c0f | 2007-09-19 00:48:42 +0000 | [diff] [blame] | 376 | void probe_idregs_fintek(uint16_t port) |
| 377 | { |
Uwe Hermann | b4db220 | 2007-09-20 23:37:56 +0000 | [diff] [blame] | 378 | uint16_t vid, did; |
Uwe Hermann | 25a6c0f | 2007-09-19 00:48:42 +0000 | [diff] [blame] | 379 | |
Uwe Hermann | 8b8d039 | 2007-10-04 15:23:38 +0000 | [diff] [blame] | 380 | probing_for("Fintek", "", port); |
| 381 | |
Uwe Hermann | b4db220 | 2007-09-20 23:37:56 +0000 | [diff] [blame] | 382 | enter_conf_mode_winbond_fintek_ite_8787(port); |
Uwe Hermann | 0120e1a | 2007-09-16 18:11:03 +0000 | [diff] [blame] | 383 | |
Uwe Hermann | 0702469 | 2007-09-20 22:13:48 +0000 | [diff] [blame] | 384 | did = regval(port, DEVICE_ID_BYTE1_REG); |
| 385 | did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8); |
Uwe Hermann | 0702469 | 2007-09-20 22:13:48 +0000 | [diff] [blame] | 386 | |
| 387 | vid = regval(port, VENDOR_ID_BYTE1_REG); |
| 388 | vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8); |
| 389 | |
Uwe Hermann | 6b4ad43 | 2007-09-23 13:17:29 +0000 | [diff] [blame] | 390 | if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) { |
Uwe Hermann | 8b8d039 | 2007-10-04 15:23:38 +0000 | [diff] [blame] | 391 | if (verbose) |
| 392 | printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did); |
Uwe Hermann | b4db220 | 2007-09-20 23:37:56 +0000 | [diff] [blame] | 393 | exit_conf_mode_winbond_fintek_ite_8787(port); |
Uwe Hermann | 0702469 | 2007-09-20 22:13:48 +0000 | [diff] [blame] | 394 | return; |
| 395 | } |
| 396 | |
Uwe Hermann | 8b8d039 | 2007-10-04 15:23:38 +0000 | [diff] [blame] | 397 | printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n", |
Uwe Hermann | 945045b | 2007-09-28 15:39:10 +0000 | [diff] [blame] | 398 | get_superio_name(reg_table, did), vid, did, port); |
Uwe Hermann | e9d4616 | 2007-10-07 20:01:23 +0000 | [diff] [blame] | 399 | chip_found = 1; |
Uwe Hermann | 0120e1a | 2007-09-16 18:11:03 +0000 | [diff] [blame] | 400 | |
Stefan Reinauer | 7a51e50 | 2008-12-01 14:18:57 +0000 | [diff] [blame] | 401 | dump_superio("Fintek", reg_table, port, did, LDN_SEL); |
Uwe Hermann | 0120e1a | 2007-09-16 18:11:03 +0000 | [diff] [blame] | 402 | |
Uwe Hermann | b4db220 | 2007-09-20 23:37:56 +0000 | [diff] [blame] | 403 | exit_conf_mode_winbond_fintek_ite_8787(port); |
Uwe Hermann | 0120e1a | 2007-09-16 18:11:03 +0000 | [diff] [blame] | 404 | } |
Robinson P. Tryon | 552cfb7 | 2008-01-15 22:30:55 +0000 | [diff] [blame] | 405 | |
Stefan Reinauer | e7b7ae2 | 2010-08-17 08:24:01 +0000 | [diff] [blame] | 406 | |
| 407 | void probe_idregs_fintek_alternative(uint16_t port) |
| 408 | { |
| 409 | uint16_t vid, did; |
| 410 | |
| 411 | probing_for("Fintek", "", port); |
| 412 | |
| 413 | enter_conf_mode_fintek_7777(port); |
| 414 | |
| 415 | did = regval(port, DEVICE_ID_BYTE1_REG); |
| 416 | did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8); |
| 417 | |
| 418 | vid = regval(port, VENDOR_ID_BYTE1_REG); |
| 419 | vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8); |
| 420 | |
| 421 | if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) { |
| 422 | if (verbose) |
| 423 | printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did); |
| 424 | exit_conf_mode_fintek_7777(port); |
| 425 | return; |
| 426 | } |
| 427 | |
| 428 | printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n", |
| 429 | get_superio_name(reg_table, did), vid, did, port); |
| 430 | chip_found = 1; |
| 431 | |
| 432 | dump_superio("Fintek", reg_table, port, did, LDN_SEL); |
| 433 | |
| 434 | exit_conf_mode_fintek_7777(port); |
| 435 | } |
| 436 | |
Robinson P. Tryon | 552cfb7 | 2008-01-15 22:30:55 +0000 | [diff] [blame] | 437 | void print_fintek_chips(void) |
| 438 | { |
| 439 | print_vendor_chips("Fintek", reg_table); |
| 440 | } |