blob: 905c94ac67794058492c4486b57068caa2240544 [file] [log] [blame]
Sven Schnellee8a7df82011-02-16 15:04:59 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
9 * the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
19 * MA 02110-1301 USA
20 */
21
22DefinitionBlock(
23 "dsdt.aml",
24 "DSDT",
25 0x03, // DSDT revision: ACPI v3.0
26 "COREv4", // OEM id
27 "COREBOOT", // OEM table id
28 0x20090419 // OEM revision
29)
30{
31 // Some generic macros
32 #include "acpi/platform.asl"
33
34 // global NVS and variables
35 #include "../../../southbridge/intel/i82801gx/acpi/globalnvs.asl"
36
37 // General Purpose Events
38 #include "acpi/gpe.asl"
39
40 // mainboard specific devices
41 #include "acpi/mainboard.asl"
42
Sven Schnellee8a7df82011-02-16 15:04:59 +000043 Scope (\_SB) {
44 Device (PCI0)
45 {
46 #include "../../../northbridge/intel/i945/acpi/i945.asl"
47 #include "../../../southbridge/intel/i82801gx/acpi/ich7.asl"
48 }
49 }
50
51 /* Chipset specific sleep states */
52 #include "../../../southbridge/intel/i82801gx/acpi/sleepstates.asl"
Sven Schnelleffcd1432011-04-11 19:43:32 +000053
54 // Dock support code
55 #include "acpi/dock.asl"
Sven Schnellee8a7df82011-02-16 15:04:59 +000056}