Philipp Deppenwiese | 714baa1 | 2017-01-02 17:58:09 +0100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2017 Patrick Rudolph <siro@das-labor.org> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <arch/io.h> |
| 17 | #include <device/pci_def.h> |
| 18 | #include <northbridge/intel/sandybridge/raminit_native.h> |
| 19 | #include <southbridge/intel/bd82x6x/pch.h> |
| 20 | #include <ec/lenovo/pmh7/pmh7.h> |
Patrick Rudolph | db27e338 | 2017-07-27 18:00:59 +0200 | [diff] [blame] | 21 | #include <drivers/lenovo/hybrid_graphics/hybrid_graphics.h> |
| 22 | #include <northbridge/intel/sandybridge/sandybridge.h> |
| 23 | #include <device/device.h> |
| 24 | #include <device/pci.h> |
| 25 | |
| 26 | static void hybrid_graphics_init(void) |
| 27 | { |
| 28 | bool peg, igd; |
| 29 | u32 reg32; |
| 30 | |
| 31 | early_hybrid_graphics(&igd, &peg); |
| 32 | |
| 33 | /* Hide disabled devices */ |
| 34 | reg32 = pci_read_config32(PCI_DEV(0, 0, 0), DEVEN); |
| 35 | reg32 &= ~(DEVEN_PEG10 | DEVEN_IGD); |
| 36 | |
| 37 | if (peg) |
| 38 | reg32 |= DEVEN_PEG10; |
| 39 | |
| 40 | if (igd) |
| 41 | reg32 |= DEVEN_IGD; |
| 42 | else |
| 43 | /* Disable IGD VGA decode, no GTT or GFX stolen */ |
| 44 | pci_write_config16(PCI_DEV(0, 0, 0), GGC, 2); |
| 45 | |
| 46 | pci_write_config32(PCI_DEV(0, 0, 0), DEVEN, reg32); |
| 47 | } |
Philipp Deppenwiese | 714baa1 | 2017-01-02 17:58:09 +0100 | [diff] [blame] | 48 | |
| 49 | void pch_enable_lpc(void) |
| 50 | { |
| 51 | /* EC Decode Range Port60/64, Port62/66 */ |
| 52 | /* Enable TPM, EC, PS/2 Keyboard/Mouse */ |
| 53 | pci_write_config16(PCH_LPC_DEV, LPC_EN, |
| 54 | CNF2_LPC_EN | MC_LPC_EN | KBC_LPC_EN); |
| 55 | |
| 56 | pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, |
| 57 | (0x0c << 16) | EC_LENOVO_PMH7_BASE | 1); |
| 58 | } |
| 59 | |
Nico Huber | ff4025c | 2018-01-14 12:34:43 +0100 | [diff] [blame^] | 60 | void mainboard_rcba_config(void) |
Philipp Deppenwiese | 714baa1 | 2017-01-02 17:58:09 +0100 | [diff] [blame] | 61 | { |
Philipp Deppenwiese | 714baa1 | 2017-01-02 17:58:09 +0100 | [diff] [blame] | 62 | } |
| 63 | |
| 64 | /* FIXME: used T530 values here */ |
| 65 | const struct southbridge_usb_port mainboard_usb_ports[] = { |
| 66 | { 1, 1, 0 }, |
| 67 | { 1, 1, 1 }, |
| 68 | { 1, 2, 3 }, |
| 69 | { 1, 1, -1 }, |
| 70 | { 1, 1, 2 }, |
| 71 | { 1, 0, -1 }, |
| 72 | { 0, 0, -1 }, |
| 73 | { 1, 2, -1 }, |
| 74 | { 1, 0, -1 }, |
| 75 | { 1, 1, 5 }, |
| 76 | { 1, 0, -1 }, |
| 77 | { 1, 0, -1 }, |
| 78 | { 1, 3, -1 }, |
| 79 | { 1, 1, -1 }, |
| 80 | }; |
| 81 | |
| 82 | void mainboard_early_init(int s3resume) |
| 83 | { |
Patrick Rudolph | db27e338 | 2017-07-27 18:00:59 +0200 | [diff] [blame] | 84 | hybrid_graphics_init(); |
Philipp Deppenwiese | 714baa1 | 2017-01-02 17:58:09 +0100 | [diff] [blame] | 85 | } |
| 86 | |
| 87 | void mainboard_config_superio(void) |
| 88 | { |
| 89 | } |
| 90 | |
| 91 | void mainboard_get_spd(spd_raw_data *spd, bool id_only) |
| 92 | { |
| 93 | read_spd(&spd[0], 0x50, id_only); |
| 94 | read_spd(&spd[2], 0x51, id_only); |
| 95 | } |