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Arthur Heymansfbc508f2017-06-01 14:50:07 +02001#
2# This file is part of the coreboot project.
3#
4# Copyright (C) 2017 Arthur Heymans <arthur@aheymans.xyz>
5#
6# This program is free software; you can redistribute it and/or modify
7# it under the terms of the GNU General Public License as published by
8# the Free Software Foundation; either version 2 of the License, or
9# (at your option) any later version.
10#
11# This program is distributed in the hope that it will be useful,
12# but WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14# GNU General Public License for more details.
15#
16
17chip northbridge/intel/x4x # Northbridge
18 device cpu_cluster 0 on # APIC cluster
19 chip cpu/intel/socket_LGA775
20 device lapic 0 on end
21 end
22 chip cpu/intel/model_1067x # CPU
23 device lapic 0xACAC off end
24 end
25 end
26 device domain 0 on # PCI domain
27 subsystemid 0x1458 0x5000 inherit
28 device pci 0.0 on # Host Bridge
29 subsystemid 0x8086 0x5756
30 end
31 device pci 1.0 on end # PEG
32 device pci 2.0 on # Integrated graphics controller
33 subsystemid 0x8086 0x5756
34 end
35 chip southbridge/intel/i82801gx # Southbridge
36 register "pirqa_routing" = "0x0b"
37 register "pirqb_routing" = "0x0b"
38 register "pirqc_routing" = "0x0b"
39 register "pirqd_routing" = "0x0b"
40 register "pirqe_routing" = "0x80"
41 register "pirqf_routing" = "0x80"
42 register "pirqg_routing" = "0x80"
43 register "pirqh_routing" = "0x0b"
44 # GPI routing
45 # 0 No effect (default)
46 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
47 # 2 SCI (if corresponding GPIO_EN bit is also set)
48 register "gpi0_routing" = "2"
49 register "gpi1_routing" = "2"
50 register "gpi2_routing" = "2"
51 register "gpi3_routing" = "2"
52 register "gpi4_routing" = "2"
53 register "gpi5_routing" = "2"
54 register "gpi6_routing" = "2"
55 register "gpi7_routing" = "2"
56 register "gpi8_routing" = "2"
57 register "gpi9_routing" = "2"
58 register "gpi10_routing" = "2"
59 register "gpi11_routing" = "2"
60 register "gpi12_routing" = "2"
61 register "gpi13_routing" = "2"
62 register "gpi14_routing" = "2"
63 register "gpi15_routing" = "2"
64
65 register "ide_enable_primary" = "0x1"
Arthur Heymansfbc508f2017-06-01 14:50:07 +020066 register "gpe0_en" = "0x440"
67
Arthur Heymansfecf7772019-11-09 14:19:04 +010068 register "gen1_dec" = "0x00fc0a01" # HWM
69
Arthur Heymansfbc508f2017-06-01 14:50:07 +020070 device pci 1b.0 on # Audio
71 subsystemid 0x8086 0x5756
72 end
73 device pci 1c.0 on end # PCIe 1
74 device pci 1c.1 on # PCIe 2: NIC
75 device pci 00.0 on
76 subsystemid 0x8086 0x5756
77 end
78 end
79 device pci 1c.2 off end # PCIe 3
80 device pci 1c.3 off end # PCIe 4
Arthur Heymansfbc508f2017-06-01 14:50:07 +020081 device pci 1d.0 on # USB
82 subsystemid 0x8086 0x5756
83 end
84 device pci 1d.1 on # USB
85 subsystemid 0x8086 0x5756
86 end
87 device pci 1d.2 on # USB
88 subsystemid 0x8086 0x5756
89 end
90 device pci 1d.3 on # USB
91 subsystemid 0x8086 0x5756
92 end
93 device pci 1d.7 on # USB
94 subsystemid 0x8086 0x5756
95 end
96 device pci 1e.0 on end # PCI bridge
Maulik V Vaghela2aa13ef2018-05-26 15:32:28 +053097 device pci 1e.2 off end # AC'97 Audio Controller
98 device pci 1e.3 off end # AC'97 Modem Controller
Arthur Heymansfbc508f2017-06-01 14:50:07 +020099 device pci 1f.0 on # ISA bridge
100 subsystemid 0x8086 0x5756
101 chip superio/winbond/w83627dhg
102 device pnp 2e.0 on # Floppy
103 # global
104 irq 0x2c = 0x13
105 #floppy
106 io 0x60 = 0x3f0
107 irq 0x70 = 0x06
108 drq 0x74 = 0x02
109 end
110 device pnp 2e.1 on # Parallel port
111 # parallel port
112 io 0x60 = 0x378
113 irq 0x70 = 5
114 drq 0x74 = 3
115 end
116 device pnp 2e.2 on # COM1
117 io 0x60 = 0x3f8
118 irq 0x70 = 4
119 end
120 device pnp 2e.3 on # COM2, IR
121 io 0x60 = 0x2f8
122 irq 0x70 = 3
123 end
124 device pnp 2e.5 on # Keyboard, mouse
125 io 0x60 = 0x60
126 io 0x62 = 0x64
127 irq 0x70 = 1
128 irq 0x72 = 12
129 end
130 device pnp 2e.6 off end # SPI
131 device pnp 2e.7 on end # GPIO6 (all input)
132 device pnp 2e.8 off end # WDT0#, PLED
133 device pnp 2e.9 off end # GPIO2
134 device pnp 2e.109 off end # GPIO3
135 device pnp 2e.209 off end # GPIO4
136 device pnp 2e.309 on # GPIO5
137 irq 0xe0 = 0xdf
138 irq 0xf3 = 0x09 # RSVD SUSLED settings
139 end
140 device pnp 2e.a on # ACPI
141 irq 0xe0 = 0x10
142 irq 0xe1 = 0x0e
143 irq 0xe4 = 0x10 # Power dram during s3
144 irq 0xe6 = 0x8c
145 end
146 device pnp 2e.b on # HWM, front pannel LED
147 io 0x60 = 0xa00
148 irq 0x70 = 0
149 end
150 device pnp 2e.c on # PECI, SST
151 irq 0xe0 = 0x11
152 irq 0xe1 = 0x59
153 end
154 end
155 end
Elyes HAOUAScd5f2b52018-05-28 13:35:35 +0200156 device pci 1f.1 off end # PATA/IDE
Arthur Heymansfbc508f2017-06-01 14:50:07 +0200157 device pci 1f.2 on # SATA
158 subsystemid 0x8086 0x5756
159 end
160 device pci 1f.3 on # SMbus
161 subsystemid 0x8086 0x5756
162 chip drivers/i2c/ck505
163 register "mask" = "{ 0xff, 0xff, 0xff,
164 0xff, 0xff, 0xff, 0xff, 0xff,
165 0xff, 0xff, 0xff, 0xff, 0xff,
166 0xff, 0xff, 0xff, 0xff, 0xff,
167 0xff, 0xff, 0xff }"
168 register "regs" = "{ 0x41, 0x99, 0xff,
169 0xff, 0xff, 0x00, 0x00, 0x06,
170 0x03, 0x65, 0x83, 0x80, 0x15,
171 0xc0, 0x09, 0x00, 0x00, 0x00,
172 0x06, 0x00, 0xea }"
173 device i2c 69 on end
174 end
175
176 end
177 end
178 end
179end