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Arthur Heymansb7ff8862017-12-30 11:06:54 +01001#
2# This file is part of the coreboot project.
3#
4# Copyright (C) 2017 Arthur Heymans <arthur@aheymans.xyz>
5#
6# This program is free software; you can redistribute it and/or modify
7# it under the terms of the GNU General Public License as published by
8# the Free Software Foundation; either version 2 of the License, or
9# (at your option) any later version.
10#
11# This program is distributed in the hope that it will be useful,
12# but WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14# GNU General Public License for more details.
15#
16
17chip northbridge/intel/x4x # Northbridge
18 device cpu_cluster 0 on # APIC cluster
19 chip cpu/intel/socket_LGA775
20 device lapic 0 on end
21 end
22 chip cpu/intel/model_1067x # CPU
23 device lapic 0xACAC off end
24 end
25 end
26 device domain 0 on # PCI domain
27 subsystemid 0x1458 0x5000 inherit
28 device pci 0.0 on # Host Bridge
29 subsystemid 0x1849 0x2e30
30 end
31 device pci 1.0 on end # PEG
32
33 device pci 2.0 on # Integrated graphics controller
34 subsystemid 0x1849 0x2e32
35 end
36 device pci 3.0 off end # ME
37 device pci 3.1 off end # ME
38 chip southbridge/intel/i82801gx # Southbridge
39 register "pirqa_routing" = "0x0b"
40 register "pirqb_routing" = "0x0b"
41 register "pirqc_routing" = "0x0b"
42 register "pirqd_routing" = "0x0b"
43 register "pirqe_routing" = "0x80"
44 register "pirqf_routing" = "0x80"
45 register "pirqg_routing" = "0x80"
46 register "pirqh_routing" = "0x0b"
47
48 register "ide_enable_primary" = "0x1"
Arthur Heymansb7ff8862017-12-30 11:06:54 +010049 register "sata_ports_implemented" = "0x3"
50 register "gpe0_en" = "0x440"
51
Arthur Heymansfecf7772019-11-09 14:19:04 +010052 register "gen1_dec" = "0x000c0291" # Superio HWM
53
Arthur Heymansb7ff8862017-12-30 11:06:54 +010054 device pci 1b.0 on # Audio
55 subsystemid 0x1849 0x3662
56 end
57 device pci 1c.0 on end # PCIe 1
58 device pci 1c.1 on end # PCIe 2
59 device pci 1c.2 off end # PCIe 3
60 device pci 1c.3 off end # PCIe 4
61 device pci 1d.0 on # USB
62 subsystemid 0x1849 0x27c8
63 end
64 device pci 1d.1 on # USB
65 subsystemid 0x1849 0x27c9
66 end
67 device pci 1d.2 on # USB
68 subsystemid 0x1849 0x27ca
69 end
70 device pci 1d.3 on # USB
71 subsystemid 0x1849 0x27cb
72 end
73 device pci 1d.7 on # USB
74 subsystemid 0x1849 0x27cc
75 end
76 device pci 1e.0 on end # PCI bridge
Arthur Heymans33fa95c2018-09-13 17:39:02 +020077 device pci 1e.2 off end # AC'97 Audio
78 device pci 1e.3 off end # AC'97 Modem
Arthur Heymansb7ff8862017-12-30 11:06:54 +010079 device pci 1f.0 on # ISA bridge
80 subsystemid 0x1849 0x27b8
81 chip superio/winbond/w83627dhg
82 device pnp 2e.0 off end # Floppy
83 device pnp 2e.1 on # Parallel port
84 # global
85 irq 0x28 = 0x70
86 irq 0x2c = 0xd2
87 # parallel port
88 io 0x60 = 0x378
89 irq 0x70 = 7
90 drq 0x74 = 3
91 end
92 device pnp 2e.2 on # COM1
93 io 0x60 = 0x3f8
94 irq 0x70 = 4
95 end
96 device pnp 2e.3 off end # COM2
97 device pnp 2e.5 on # Keyboard & MOUSE
98 io 0x60 = 0x60
99 io 0x62 = 0x64
100 irq 0x70 = 1
101 irq 0x72 = 0x0C
102 end
103 device pnp 2e.6 off end # SPI
104 device pnp 2e.7 off end # GPIO6
105 device pnp 2e.8 off end # WDT0#, PLED
Elyes HAOUAS967b84d2018-10-09 22:33:11 +0200106 device pnp 2e.9 on end # GPIO2
Arthur Heymansb7ff8862017-12-30 11:06:54 +0100107 device pnp 2e.109 on # GPIO3
108 irq 0xfe = 0x07
109 end
110 device pnp 2e.209 on # GPIO4
111 irq 0xf4 = 0x73
112 end
113 device pnp 2e.309 off end # GPIO5
114 device pnp 2e.a on # ACPI
115 irq 0xe4 = 0x10 # Power dram during s3
116 end
117 device pnp 2e.b on # HWM, front pannel LED
118 io 0x60 = 0x290
119 irq 0x70 = 0
120 end
121 device pnp 2e.c off end # PECI, SST
122 end
123 end
124 device pci 1f.1 on # PATA/IDE
125 subsystemid 0x1849 0x27df
126 end
127 device pci 1f.2 on # SATA
128 subsystemid 0x1849 0x27c0
129 end
130 device pci 1f.3 on # SMbus
131 subsystemid 0x1849 0x27da
132 end
Arthur Heymansb7ff8862017-12-30 11:06:54 +0100133 end
134 end
135end