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blob: 5f5da72d89712d520f434a852ba03733ea51cb08 [file] [log] [blame]
Lee Leahyc1e4f892016-01-07 11:24:24 -0800[diff] [blame]1<!DOCTYPE html>
2<html>
3 <head>
4 <title>Quark&trade; SoC</title>
5 </head>
6 <body>
7
8<h1>Intel&reg; Quark&trade; SoC</h1>
9<table>
10 <tr>
11 <td><a target="_blank" href="http://www.intel.com/content/dam/www/public/us/en/images/embedded/16x9/edc-quark-block-diagram-16x9.png"><img alt="Quark Block Diagram" src="http://www.intel.com/content/dam/www/public/us/en/images/embedded/16x9/edc-quark-block-diagram-16x9.png" width=500></a></td>
12 <td>
Lee Leahy05c02152016-02-02 07:55:38 -0800[diff] [blame]13 The Quark&trade; SoC code was developed using the
14 <a target="_blank" href="../Board/galileo.html">Galileo Gen 2</a>
15 board:
16 <ul>
Lee Leahye8424cf2016-02-03 07:28:22 -0800[diff] [blame]17 <li><a target="_blank" href="../development.html">Overall</a> development</li>
Lee Leahy05c02152016-02-02 07:55:38 -0800[diff] [blame]18 <li><a target="_blank" href="soc.html">SoC</a> support</li>
19 <li><a target="_blank" href="../fsp1_1.html">FSP 1.1</a> integration</li>
20 <li><a target="_blank" href="../Board/board.html">Board</a> support</li>
21 </ul>
Lee Leahyc1e4f892016-01-07 11:24:24 -0800[diff] [blame]22 </td>
23 </tr>
24</table>
25
26
27
28<hr>
29<h1>Quark&trade; Documentation</h1>
30<ul>
31 <li><a target="_blank" href="http://www.intel.com/content/dam/www/public/us/en/images/embedded/16x9/edc-quark-block-diagram-16x9.png">Block Diagram</a></li>
32 <li>Intel&reg; 64 and IA-32 Architectures <a target="_blank" href="http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf">Software Developer Manual</a></li>
33 <li><a target="_blank" href="http://www.intel.com/content/www/us/en/embedded/products/quark/specifications.html">Specifications</a>:
34 <ul>
35 <li><a target="_blank" href="http://ark.intel.com/products/79084/Intel-Quark-SoC-X1000-16K-Cache-400-MHz">X1000</a>
36 - <a target="_blank" href="http://www.intel.com/content/www/us/en/search.html?keyword=X1000">Documentation</a>:
37 <ul>
38 <li><a target="_blank" href="http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/quark-x1000-datasheet.pdf">Datasheet</a></li>
39 <li><a target="_blank" href="http://www.intel.com/content/dam/support/us/en/documents/processors/quark/sb/intelquarkcore_devman_001.pdf">Developer's Manual</a></li>
40 <li><a target="_blank" href="http://www.intel.com/content/dam/www/public/us/en/documents/product-briefs/intel-quark-product-brief-v3.pdf">Product Brief</a></li>
41 </ul>
42 </li>
43 </ul>
44 </li>
45</ul>
46
47
48
49<hr>
Lee Leahy4ee073d2016-02-28 06:22:47 -0800[diff] [blame]50<h1><a name="CorebootPayloadPkg">Quark&trade; EDK2 CorebootPayloadPkg</a></h1>
Lee Leahydb7410e2016-02-10 11:12:50 -0800[diff] [blame]51<p>
52Build Instructions:
53</p>
54<ol>
55 <li>Set up <a href="#BuildEnvironment">build environment</a></li>
Lee Leahyc7a94332016-02-20 17:44:35 -0800[diff] [blame]56 <li>For the Galileo Gen 2, replace the following lines in
57 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc:
58<pre><code> gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|FALSE
59 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x03F8
60</code></pre>
61with:
62<pre><code>#
63# Quark configuration
64#
65 gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|1
66
67#
68# Specify Galileo HSUART1 serial port
69#
70[PcdsPatchableInModule.common]
71 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xff}
72 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE
73 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xA0019000
74 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|4
75
76 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|44236800
77 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|921600
78 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|3 # 8-bits, no parity
79 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE
80 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable|FALSE
81 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|1 # Enable FIFO
82 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|16
83</code></pre>
84 </li>
Lee Leahydb7410e2016-02-10 11:12:50 -0800[diff] [blame]85 <li>Build Instructions:
Lee Leahyc1e4f892016-01-07 11:24:24 -0800[diff] [blame]86 <ul>
Lee Leahyc7a94332016-02-20 17:44:35 -0800[diff] [blame]87 <li>Linux (assumes GCC48):
88 <ol type="A">
89 <li>Edit Conf/tools_def.txt to add " -march=i586" to the IA32_CC_FLAGS
90 for the GCC compiler being used:
91<pre><code>*_GCC48_IA32_CC_FLAGS = DEF(GCC48_IA32_CC_FLAGS) -Os -march=i586</code></pre>
92 </li>
93 <li>
Lee Leahydb7410e2016-02-10 11:12:50 -0800[diff] [blame]94<pre><code>build -p CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc -a IA32 -t GCC48 -b DEBUG -DDEBUG_PROPERTY_MASK=0x27 -DDEBUG_PRINT_ERROR_LEVEL=0x80000042
Lee Leahyc7a94332016-02-20 17:44:35 -0800[diff] [blame]95ls Build/CorebootPayloadPkgIA32/DEBUG_GCC48/FV/UEFIPAYLOAD.fd
Lee Leahydb7410e2016-02-10 11:12:50 -0800[diff] [blame]96</code></pre>
Lee Leahyc7a94332016-02-20 17:44:35 -0800[diff] [blame]97 </li>
98 </ol>
Lee Leahydb7410e2016-02-10 11:12:50 -0800[diff] [blame]99 </li>
100 <li>Windows:
101<pre><code>build -p CorebootPayloadPkg\CorebootPayloadPkgIa32.dsc -a IA32 -t VS2012x86 -b DEBUG -DDEBUG_PROPERTY_MASK=0x27 -DDEBUG_PRINT_ERROR_LEVEL=0x80000042
Lee Leahyc7a94332016-02-20 17:44:35 -0800[diff] [blame]102dir Build\CorebootPayloadPkgIA32\DEBUG_VS2012x86\FV\UEFIPAYLOAD.fd
Lee Leahydb7410e2016-02-10 11:12:50 -0800[diff] [blame]103</code></pre>
104 </li>
105 </ul>
106 </li>
Lee Leahyc7a94332016-02-20 17:44:35 -0800[diff] [blame]107 <li>In the .config for coreboot, set the following Kconfig values:
Lee Leahydb7410e2016-02-10 11:12:50 -0800[diff] [blame]108 <ul>
109 <li>CONFIG_PAYLOAD_ELF=y</li>
110 <li>CONFIG_PAYLOAD_FILE="path to UEFIPAYLOAD.fd"</li>
111 </ul>
112 </li>
113 <li>Build coreboot</li>
114 <li>Copy the image build/coreboot.rom into flash</li>
115</ol>
116
117
118
119<hr>
120<h1><a name="BuildEnvironment">Quark&trade; EDK2 Build Environment</a></h1>
121<p>
122 Use the following steps to setup a build environment:
123</p>
124<ol>
125 <li>Get the EDK2 sources:
126 <ol type="A">
Lee Leahyc1e4f892016-01-07 11:24:24 -0800[diff] [blame]127 <li>EDK2: git clone <a target="_blank" href="https://github.com/tianocore/edk2.git">https://github.com/tianocore/edk2.git</a></li>
128 <li>EDK2-FatPkg: git clone <a target="_blank" href="https://github.com/tianocore/edk2-FatPkg.git">https://github.com/tianocore/edk2-FatPkg.git</a> FatPkg</li>
129 <li>EDK2-non-osi: git clone <a target="_blank" href="https://github.com/tianocore/edk2-non-osi.git">https://github.com/tianocore/edk2-non-osi.git</a></li>
130 <li>Win32 BaseTools: git clone <a target="_blank" href="https://github.com/tianocore/edk2-BaseTools-win32.git">https://github.com/tianocore/edk2-BaseTools-win32.git</a></li>
Lee Leahydb7410e2016-02-10 11:12:50 -0800[diff] [blame]131 </ol>
Lee Leahyc1e4f892016-01-07 11:24:24 -0800[diff] [blame]132 </li>
Lee Leahydb7410e2016-02-10 11:12:50 -0800[diff] [blame]133 <li>Set up a build window:
134 <ul>
135 <li>Linux:
Lee Leahy1c85fea2016-02-08 13:57:47 -0800[diff] [blame]136<pre><code>export WORKSPACE=$PWD
137export PACKAGES_PATH="$PWD/edk2:$PWD/FatPkg:$PWD/edk2-non-osi"
138cd edk2
139export WORKSPACE=$PWD
140. edksetup.sh
Lee Leahy1c85fea2016-02-08 13:57:47 -0800[diff] [blame]141</code></pre>
Lee Leahydb7410e2016-02-10 11:12:50 -0800[diff] [blame]142 </li>
143 <li>Windows:
Lee Leahyc1e4f892016-01-07 11:24:24 -0800[diff] [blame]144<pre><code>set WORKSPACE=%CD%
145set PACKAGES_PATH=%WORKSPACE%\edk2;%WORKSPACE%\FatPkg;%WORKSPACE%\edk2-non-osi
146set EDK_TOOLS_BIN=%WORKSPACE%\edk2-BaseTools-win32
147cd edk2
148edksetup.bat
Lee Leahyc1e4f892016-01-07 11:24:24 -0800[diff] [blame]149</code></pre>
Lee Leahydb7410e2016-02-10 11:12:50 -0800[diff] [blame]150 </li>
151 </ul>
Lee Leahyc1e4f892016-01-07 11:24:24 -0800[diff] [blame]152 </li>
Lee Leahydb7410e2016-02-10 11:12:50 -0800[diff] [blame]153</ol>
154
155<p>
156EDK2 Documentation:
157</p>
158<ul>
159 <li>Build <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/Build_Spec_1_26.pdf">V1.26</a></li>
160 <li>Coding Standards <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/CCS_2_1_Draft.pdf">V2.1</a></li>
161 <li>DEC <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/DEC_Spec_1_25.pdf">V1.25</a></li>
162 <li>DSC <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/DSC_Spec_1_26.pdf">V1.26</a></li>
Lee Leahyfcfa94d2016-03-03 16:08:29 -0800[diff] [blame^]163 <li><a target="_blank" href="https://github.com/tianocore/tianocore.github.io/wiki/UEFI-Driver-Writer's-Guide">Driver Writer's Guide</a></li>
Lee Leahydb7410e2016-02-10 11:12:50 -0800[diff] [blame]164 <li>Expression Syntax <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/ExpressionSyntax_1.1.pdf">V1.1</a></li>
165 <li>FDF <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/FDF_Spec_1_26.pdf">V1.26</a></li>
166 <li>INF <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/INF_Spec_1_25.pdf">V1.25</a></li>
167 <li>PCD <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/PCD_Infrastructure.pdf">PCD</a>V0.55</li>
168 <li>UNI <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/UNI_File_Spec_v1_2_Errata_A.pdf">V1.2 Errata A</a></li>
169 <li>VRF <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/VFR_1_9.pdf">V1.9</a></li>
Lee Leahyc1e4f892016-01-07 11:24:24 -0800[diff] [blame]170</ul>
171
172
173
174<hr>
Lee Leahydb7410e2016-02-10 11:12:50 -0800[diff] [blame]175<h1>Quark&trade; FSP</h1>
176<p>
177Documentation:
178</p>
179<ul>
180 <li>Intel&reg; Firmware Support Package External Architecture Specification <a target="_blank" href="http://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec-v1-1.pdf">V1.1</a></li>
181</ul>
182
183
184
185<hr>
186<h1>Quark&trade; EDK2 BIOS</h1>
187<p>
188Build Instructions:
189</p>
190<ol>
191 <li>Set up <a href="#BuildEnvironment">build environment</a></li>
192 <li>Build the image:
193 <ul>
194 <li>Linux:
195<pre><code>build -p QuarkPlatformPkg/Quark.dsc -a IA32 -t GCC48 -b DEBUG -DDEBUG_PROPERTY_MASK=0x27 -DDEBUG_PRINT_ERROR_LEVEL=0x80000042
196ls Build/Quark/DEBUG_GCC48/FV/Quark.fd
197</code></pre>
198 </li>
199 <li>Windows:
200<pre><code>build -p QuarkPlatformPkg/Quark.dsc -a IA32 -t VS2012x86 -b DEBUG -DDEBUG_PROPERTY_MASK=0x27 -DDEBUG_PRINT_ERROR_LEVEL=0x80000042
201dir Build\Quark\DEBUG_VS2012x86\FV\Quark.fd
202</code></pre>
203 </li>
204 </ul>
205 </li>
206</ol>
207
208<p>
209Documentation:
210</p>
211<ul>
Lee Leahyfcfa94d2016-03-03 16:08:29 -0800[diff] [blame^]212 <li><a target="_blank" href="https://github.com/tianocore/edk2/tree/master/QuarkPlatformPkg">EDK II firmware for Intel&reg; Quark&trade; SoC X1000 based platforms</a></li>
Lee Leahydb7410e2016-02-10 11:12:50 -0800[diff] [blame]213 <li>Intel&reg; Quark&trade; SoC X1000 <a target="_blank" href="http://www.intel.com/content/dam/www/public/us/en/documents/guides/quark-x1000-uefi-firmware-writers-guide.pdf">UEFI Firmware Writer's Guide</a></li>
214</ul>
215
216
217
218<hr>
Lee Leahyfcfa94d2016-03-03 16:08:29 -0800[diff] [blame^]219<p>Modified: 29 February 2016</p>
Lee Leahyc1e4f892016-01-07 11:24:24 -0800[diff] [blame]220 </body>
221</html>