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review.coreboot.org / coreboot / fc7900b6b96cdb7044122bc00bbd5c760a069325 / . / src / mainboard / starlabs / labtop / variants / cml / include / variant / hda_verb.h
blob: 190474f6d1091311a78ffe89eb413a03753139ad [file] [log] [blame]
Sean Rhodes2e665eb2021-06-01 22:55:07 +0100[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
2
3#ifndef _HDA_VERB_H_
4#define _HDA_VERB_H_
5
6#include <device/azalia_device.h>
7#include <device/azalia.h>
8
9const u32 cim_verb_data[] = {
10 /* coreboot specific header */
11 0x10ec0256, // Codec Vendor / Device ID: Realtek ALC256
12 0xffffffff, // Subsystem ID
13 0x0000002b, // Number of jacks (NID entries)
14
15 /* Rest Codec First */
16 AZALIA_RESET(0x1),
17
18 /* HDA Codec Subsystem ID Verb-table
19 HDA Codec Subsystem ID: 0x10EC119E */
20 0x0017209E,
21 0x00172111,
22 0x001722EC,
23 0x00172310,
24 /* Pin Widget Verb-table */
25 AZALIA_PIN_CFG(0, 0x01, 0x00000000),
26 AZALIA_PIN_CFG(0, 0x12, 0x90a61120),
27 AZALIA_PIN_CFG(0, 0x13, 0x40000000),
28 AZALIA_PIN_CFG(0, 0x14, 0x90171110),
29 AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
30 AZALIA_PIN_CFG(0, 0x19, 0x02ab1020),
31 AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
32 AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
33 AZALIA_PIN_CFG(0, 0x1d, 0x411111f0),
34 AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
35 AZALIA_PIN_CFG(0, 0x21, 0x022b1010),
36 /* ONE DOES NOT SIMPLY
37 MAKE IT WORK WITH WINDOWS */
38 /* RESET to D0 */
39 0x00170500,
40 0x00170500,
41 0x00170500,
42 0x00170500,
43 /* RESET Register */
44 0x0205001A,
45 0x02048003,
46 0x0205001A,
47 0x0204C003,
48 /* ALC256 default-1(Class D RESET) */
49 0x0205003C,
50 0x02040354,
51 0x0205003C,
52 0x02040314,
53 /* ALC256 default-2 */
54 0x02050040,
55 0x02049800,
56 0x02050034,
57 0x0204023C,
58 /* ALC256 Speaker output power - 4 ohm 2.2W (+12dB gain) + Combo Jack TRS setting */
59 0x02050038,
60 0x02047901,
61 0x02050045,
62 0x02045089,
63 /* H/W AGC setting-1 */
64 0x02050016,
65 0x02040C50,
66 0x02050012,
67 0x0204EBC2,
68 /* H/W AGC setting-2 */
69 0x02050013,
70 0x0204401D,
71 0x02050016,
72 0x02044E50,
73 /* Zero data + EAPD to verb-control */
74 0x02050037,
75 0x0204FE15,
76 0x02050010,
77 0x02040020,
78 /* Zero data */
79 0x02050030,
80 0x02048000,
81 0x02050030,
82 0x02048000,
83 /* ALC256 default-3 */
84 0x05750003,
85 0x05740DA3,
86 0x02050046,
87 0x02040004,
88 /* ALC256 default-4 */
89 0x0205001B,
90 0x02040A4B,
91 0x02050008,
92 0x02046A6C,
93 /* JD1 */
94 0x02050009,
95 0x0204E003,
96 0x0205000A,
97 0x02047770,
98 /* Microphone + Array MIC security Disable +ADC clock Enable */
99 0x0205000D,
100 0x0204A020,
101 0x02050005,
102 0x02040700,
103 /* Speaker Enable */
104 0x0205000C,
105 0x020401EF,
106 0x0205000C,
107 0x020401EF,
108 /* EQ Bypass + EQ HPF cutoff 250Hz */
109 0x05350000,
110 0x0534201A,
111 0x0535001d,
112 0x05340800,
113 /* EQ-2 */
114 0x0535001e,
115 0x05340800,
116 0x05350003,
117 0x05341EF8,
118 /* EQ-3 */
119 0x05350004,
120 0x05340000,
121 0x05450000,
122 0x05442000,
123 /* EQ-4 */
124 0x0545001d,
125 0x05440800,
126 0x0545001e,
127 0x05440800,
128 /* EQ-5 */
129 0x05450003,
130 0x05441EF8,
131 0x05450004,
132 0x05440000,
133 /* EQ Update */
134 0x05350000,
135 0x0534E01A,
136 0x05350000,
137 0x0534E01A,
138
139 0x8086280b, /* Codec Vendor / Device ID: Intel */
140 0x80860101, /* Subsystem ID */
141 0x00000004, /* Number of 4 dword sets */
142
143 AZALIA_SUBVENDOR(2, 0x80860101),
144
145 AZALIA_PIN_CFG(2, 0x05, 0x18560010),
146 AZALIA_PIN_CFG(2, 0x06, 0x18560010),
147 AZALIA_PIN_CFG(2, 0x07, 0x18560010),
148};
149
150const u32 pc_beep_verbs[] = {
151};
152
153AZALIA_ARRAY_SIZES;
154
155#endif