blob: 98806de9f46970696d8497087ef2046e91f93c83 [file] [log] [blame]
Iru Cai03e96a82017-01-26 14:51:47 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2017 Iru Cai <mytbk920423@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
Arthur Heymansfa5d0f82019-11-12 19:11:50 +010016#include <bootblock_common.h>
Kyösti Mälkkif1b58b72019-03-01 13:43:02 +020017#include <device/pci_ops.h>
Iru Cai03e96a82017-01-26 14:51:47 +080018#include <northbridge/intel/sandybridge/sandybridge.h>
19#include <northbridge/intel/sandybridge/raminit_native.h>
20#include <southbridge/intel/bd82x6x/pch.h>
21#include <ec/hp/kbc1126/ec.h>
22
Iru Cai03e96a82017-01-26 14:51:47 +080023const struct southbridge_usb_port mainboard_usb_ports[] = {
24 { 1, 1, 0 },
25 { 1, 1, 0 },
26 { 1, 1, 1 },
27 { 1, 1, 1 },
28 { 1, 0, 2 },
29 { 1, 1, 2 },
30 { 0, 0, 3 },
31 { 1, 0, 3 },
32 { 1, 1, 4 },
33 { 1, 0, 4 },
34 { 0, 0, 5 },
35 { 1, 1, 5 },
36 { 0, 0, 6 },
37 { 1, 1, 6 },
38};
39
Arthur Heymansfa5d0f82019-11-12 19:11:50 +010040void bootblock_mainboard_early_init(void)
Iru Cai03e96a82017-01-26 14:51:47 +080041{
42 kbc1126_enter_conf();
43 kbc1126_mailbox_init();
44 kbc1126_kbc_init();
45 kbc1126_ec_init();
46 kbc1126_com1_init();
47 kbc1126_pm1_init();
48 kbc1126_exit_conf();
49 kbc1126_disable4e();
50}
51
52void mainboard_get_spd(spd_raw_data *spd, bool id_only)
53{
54 read_spd(&spd[0], 0x50, id_only);
55 read_spd(&spd[2], 0x52, id_only);
56}