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Angel Pons5f1bf2f2020-04-03 01:21:16 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Gergely Kiss3dce9f02017-12-27 15:24:04 +01002
3#include <arch/pirq_routing.h>
4
5const struct irq_routing_table intel_irq_routing_table = {
6 PIRQ_SIGNATURE, /* u32 signature */
7 PIRQ_VERSION, /* u16 version */
8 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* Max. number of devices on the bus */
9 0x00, /* Interrupt router bus */
10 (0x14 << 3) | 0x3, /* Interrupt router dev */
11 0, /* IRQs devoted exclusively to PCI usage */
12 0x1002, /* Vendor */
13 0x439d, /* Device */
14 0, /* Miniport */
15 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
Mike Banon834d8c22020-01-07 18:47:40 +030016 0x3b, /* Checksum (has to be set to some value that
Gergely Kiss3dce9f02017-12-27 15:24:04 +010017 * would give 0 after the sum of all bytes
18 * for this structure (including checksum).
19 */
Patrick Georgi71555952021-02-11 14:40:01 +010020 /* clang-format off */
Gergely Kiss3dce9f02017-12-27 15:24:04 +010021 {
22 /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
23 {0x00, (0x01 << 3) | 0x0, {{0x01, 0x9cb8}, {0x02, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
24 {0x00, (0x02 << 3) | 0x0, {{0x01, 0x9cb8}, {0x02, 0x9cb8}, {0x03, 0x9cb8}, {0x04, 0x9cb8}}, 0x0, 0x0},
25 {0x00, (0x10 << 3) | 0x0, {{0x03, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
26 {0x00, (0x11 << 3) | 0x0, {{0x04, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
27 {0x00, (0x12 << 3) | 0x0, {{0x03, 0x9cb8}, {0x02, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
28 {0x00, (0x13 << 3) | 0x0, {{0x03, 0x9cb8}, {0x02, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
29 {0x00, (0x14 << 3) | 0x0, {{0x01, 0x9cb8}, {0x02, 0x9cb8}, {0x03, 0x9cb8}, {0x04, 0x9cb8}}, 0x0, 0x0},
Mike Banon834d8c22020-01-07 18:47:40 +030030 {0x00, (0x16 << 3) | 0x0, {{0x03, 0x9cb8}, {0x02, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
Gergely Kiss3dce9f02017-12-27 15:24:04 +010031 {0x01, (0x00 << 3) | 0x0, {{0x01, 0x9cb8}, {0x02, 0x9cb8}, {0x03, 0x9cb8}, {0x04, 0x9cb8}}, 0x0, 0x0},
32 {0x02, (0x00 << 3) | 0x0, {{0x02, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
33 }
Patrick Georgi71555952021-02-11 14:40:01 +010034 /* clang-format on */
Gergely Kiss3dce9f02017-12-27 15:24:04 +010035};
36
37unsigned long write_pirq_routing_table(unsigned long addr)
38{
39 return copy_pirq_routing_table(addr, &intel_irq_routing_table);
40}