Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation; version 2 of the License. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 13 | */ |
| 14 | |
| 15 | #include <console/console.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 16 | #include <device/pci_ops.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 17 | #include <device/device.h> |
| 18 | #include <device/pci.h> |
| 19 | #include <device/pci_def.h> |
Julius Werner | 4ee4bd5 | 2014-10-20 13:46:39 -0700 | [diff] [blame] | 20 | #include <soc/iobp.h> |
| 21 | #include <soc/pch.h> |
| 22 | #include <soc/pci_devs.h> |
| 23 | #include <soc/ramstage.h> |
| 24 | #include <soc/rcba.h> |
| 25 | #include <soc/serialio.h> |
| 26 | #include <soc/spi.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 27 | |
| 28 | u8 pch_revision(void) |
| 29 | { |
| 30 | return pci_read_config8(PCH_DEV_LPC, PCI_REVISION_ID); |
| 31 | } |
| 32 | |
| 33 | u16 pch_type(void) |
| 34 | { |
| 35 | return pci_read_config16(PCH_DEV_LPC, PCI_DEVICE_ID); |
| 36 | } |
| 37 | |
| 38 | /* Return 1 if PCH type is WildcatPoint */ |
| 39 | int pch_is_wpt(void) |
| 40 | { |
| 41 | return ((pch_type() & 0xfff0) == 0x9cc0) ? 1 : 0; |
| 42 | } |
| 43 | |
| 44 | /* Return 1 if PCH type is WildcatPoint ULX */ |
| 45 | int pch_is_wpt_ulx(void) |
| 46 | { |
| 47 | u16 lpcid = pch_type(); |
| 48 | |
| 49 | switch (lpcid) { |
| 50 | case PCH_WPT_BDW_Y_SAMPLE: |
| 51 | case PCH_WPT_BDW_Y_PREMIUM: |
| 52 | case PCH_WPT_BDW_Y_BASE: |
| 53 | return 1; |
| 54 | } |
| 55 | |
| 56 | return 0; |
| 57 | } |
| 58 | |
| 59 | u32 pch_read_soft_strap(int id) |
| 60 | { |
| 61 | u32 fdoc; |
| 62 | |
| 63 | fdoc = SPIBAR32(SPIBAR_FDOC); |
| 64 | fdoc &= ~0x00007ffc; |
| 65 | SPIBAR32(SPIBAR_FDOC) = fdoc; |
| 66 | |
| 67 | fdoc |= 0x00004000; |
| 68 | fdoc |= id * 4; |
| 69 | SPIBAR32(SPIBAR_FDOC) = fdoc; |
| 70 | |
| 71 | return SPIBAR32(SPIBAR_FDOD); |
| 72 | } |
| 73 | |
Kyösti Mälkki | 55d0ab5 | 2019-09-12 15:44:28 +0300 | [diff] [blame] | 74 | #ifndef __SIMPLE_DEVICE__ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 75 | |
| 76 | /* Put device in D3Hot Power State */ |
Elyes HAOUAS | 4658a98 | 2018-09-20 08:46:35 +0200 | [diff] [blame] | 77 | static void pch_enable_d3hot(struct device *dev) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 78 | { |
| 79 | u32 reg32 = pci_read_config32(dev, PCH_PCS); |
| 80 | reg32 |= PCH_PCS_PS_D3HOT; |
| 81 | pci_write_config32(dev, PCH_PCS, reg32); |
| 82 | } |
| 83 | |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 84 | /* RCBA function disable and posting read to flush the transaction */ |
| 85 | static void rcba_function_disable(u32 reg, u32 bit) |
| 86 | { |
| 87 | RCBA32_OR(reg, bit); |
| 88 | RCBA32(reg); |
| 89 | } |
| 90 | |
Martin Roth | de7ed6f | 2014-12-07 14:58:18 -0700 | [diff] [blame] | 91 | /* Set bit in Function Disable register to hide this device */ |
Elyes HAOUAS | 4658a98 | 2018-09-20 08:46:35 +0200 | [diff] [blame] | 92 | void pch_disable_devfn(struct device *dev) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 93 | { |
| 94 | switch (dev->path.pci.devfn) { |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 95 | case PCH_DEVFN_ADSP: /* Audio DSP */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 96 | rcba_function_disable(FD, PCH_DISABLE_ADSPD); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 97 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 98 | case PCH_DEVFN_XHCI: /* XHCI */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 99 | rcba_function_disable(FD, PCH_DISABLE_XHCI); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 100 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 101 | case PCH_DEVFN_SDMA: /* DMA */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 102 | pch_enable_d3hot(dev); |
| 103 | pch_iobp_update(SIO_IOBP_FUNCDIS0, ~0UL, SIO_IOBP_FUNCDIS_DIS); |
| 104 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 105 | case PCH_DEVFN_I2C0: /* I2C0 */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 106 | pch_enable_d3hot(dev); |
| 107 | pch_iobp_update(SIO_IOBP_FUNCDIS1, ~0UL, SIO_IOBP_FUNCDIS_DIS); |
| 108 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 109 | case PCH_DEVFN_I2C1: /* I2C1 */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 110 | pch_enable_d3hot(dev); |
| 111 | pch_iobp_update(SIO_IOBP_FUNCDIS2, ~0UL, SIO_IOBP_FUNCDIS_DIS); |
| 112 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 113 | case PCH_DEVFN_SPI0: /* SPI0 */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 114 | pch_enable_d3hot(dev); |
| 115 | pch_iobp_update(SIO_IOBP_FUNCDIS3, ~0UL, SIO_IOBP_FUNCDIS_DIS); |
| 116 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 117 | case PCH_DEVFN_SPI1: /* SPI1 */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 118 | pch_enable_d3hot(dev); |
| 119 | pch_iobp_update(SIO_IOBP_FUNCDIS4, ~0UL, SIO_IOBP_FUNCDIS_DIS); |
| 120 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 121 | case PCH_DEVFN_UART0: /* UART0 */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 122 | pch_enable_d3hot(dev); |
| 123 | pch_iobp_update(SIO_IOBP_FUNCDIS5, ~0UL, SIO_IOBP_FUNCDIS_DIS); |
| 124 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 125 | case PCH_DEVFN_UART1: /* UART1 */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 126 | pch_enable_d3hot(dev); |
| 127 | pch_iobp_update(SIO_IOBP_FUNCDIS6, ~0UL, SIO_IOBP_FUNCDIS_DIS); |
| 128 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 129 | case PCH_DEVFN_ME: /* MEI #1 */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 130 | rcba_function_disable(FD2, PCH_DISABLE_MEI1); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 131 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 132 | case PCH_DEVFN_ME_2: /* MEI #2 */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 133 | rcba_function_disable(FD2, PCH_DISABLE_MEI2); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 134 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 135 | case PCH_DEVFN_ME_IDER: /* IDE-R */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 136 | rcba_function_disable(FD2, PCH_DISABLE_IDER); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 137 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 138 | case PCH_DEVFN_ME_KT: /* KT */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 139 | rcba_function_disable(FD2, PCH_DISABLE_KT); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 140 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 141 | case PCH_DEVFN_SDIO: /* SDIO */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 142 | pch_enable_d3hot(dev); |
| 143 | pch_iobp_update(SIO_IOBP_FUNCDIS7, ~0UL, SIO_IOBP_FUNCDIS_DIS); |
| 144 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 145 | case PCH_DEVFN_GBE: /* Gigabit Ethernet */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 146 | rcba_function_disable(BUC, PCH_DISABLE_GBE); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 147 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 148 | case PCH_DEVFN_HDA: /* HD Audio Controller */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 149 | rcba_function_disable(FD, PCH_DISABLE_HD_AUDIO); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 150 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 151 | case PCI_DEVFN(PCH_DEV_SLOT_PCIE, 0): /* PCI Express Root Port 1 */ |
| 152 | case PCI_DEVFN(PCH_DEV_SLOT_PCIE, 1): /* PCI Express Root Port 2 */ |
| 153 | case PCI_DEVFN(PCH_DEV_SLOT_PCIE, 2): /* PCI Express Root Port 3 */ |
| 154 | case PCI_DEVFN(PCH_DEV_SLOT_PCIE, 3): /* PCI Express Root Port 4 */ |
| 155 | case PCI_DEVFN(PCH_DEV_SLOT_PCIE, 4): /* PCI Express Root Port 5 */ |
| 156 | case PCI_DEVFN(PCH_DEV_SLOT_PCIE, 5): /* PCI Express Root Port 6 */ |
| 157 | case PCI_DEVFN(PCH_DEV_SLOT_PCIE, 6): /* PCI Express Root Port 7 */ |
| 158 | case PCI_DEVFN(PCH_DEV_SLOT_PCIE, 7): /* PCI Express Root Port 8 */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 159 | rcba_function_disable(FD, |
| 160 | PCH_DISABLE_PCIE(PCI_FUNC(dev->path.pci.devfn))); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 161 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 162 | case PCH_DEVFN_EHCI: /* EHCI #1 */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 163 | rcba_function_disable(FD, PCH_DISABLE_EHCI1); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 164 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 165 | case PCH_DEVFN_LPC: /* LPC */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 166 | rcba_function_disable(FD, PCH_DISABLE_LPC); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 167 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 168 | case PCH_DEVFN_SATA: /* SATA #1 */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 169 | rcba_function_disable(FD, PCH_DISABLE_SATA1); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 170 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 171 | case PCH_DEVFN_SMBUS: /* SMBUS */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 172 | rcba_function_disable(FD, PCH_DISABLE_SMBUS); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 173 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 174 | case PCH_DEVFN_SATA2: /* SATA #2 */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 175 | rcba_function_disable(FD, PCH_DISABLE_SATA2); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 176 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 177 | case PCH_DEVFN_THERMAL: /* Thermal Subsystem */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 178 | rcba_function_disable(FD, PCH_DISABLE_THERMAL); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 179 | break; |
| 180 | } |
| 181 | } |
| 182 | |
Elyes HAOUAS | 4658a98 | 2018-09-20 08:46:35 +0200 | [diff] [blame] | 183 | void broadwell_pch_enable_dev(struct device *dev) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 184 | { |
| 185 | u32 reg32; |
| 186 | |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 187 | /* These devices need special enable/disable handling */ |
| 188 | switch (PCI_SLOT(dev->path.pci.devfn)) { |
| 189 | case PCH_DEV_SLOT_PCIE: |
| 190 | case PCH_DEV_SLOT_EHCI: |
| 191 | case PCH_DEV_SLOT_HDA: |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 192 | return; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 193 | } |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 194 | |
| 195 | if (!dev->enabled) { |
| 196 | printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); |
| 197 | |
| 198 | /* Ensure memory, io, and bus master are all disabled */ |
| 199 | reg32 = pci_read_config32(dev, PCI_COMMAND); |
| 200 | reg32 &= ~(PCI_COMMAND_MASTER | |
| 201 | PCI_COMMAND_MEMORY | PCI_COMMAND_IO); |
| 202 | pci_write_config32(dev, PCI_COMMAND, reg32); |
| 203 | |
| 204 | /* Disable this device if possible */ |
| 205 | pch_disable_devfn(dev); |
| 206 | } else { |
| 207 | /* Enable SERR */ |
| 208 | reg32 = pci_read_config32(dev, PCI_COMMAND); |
| 209 | reg32 |= PCI_COMMAND_SERR; |
| 210 | pci_write_config32(dev, PCI_COMMAND, reg32); |
| 211 | } |
| 212 | } |
| 213 | |
| 214 | #endif |