Mathew King | 10dd775 | 2021-01-26 16:08:14 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | |
| 3 | #include <baseboard/gpio.h> |
| 4 | #include <baseboard/variants.h> |
| 5 | #include <commonlib/helpers.h> |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 6 | #include <soc/gpio.h> |
Mathew King | 10dd775 | 2021-01-26 16:08:14 -0700 | [diff] [blame] | 7 | |
| 8 | /* GPIO configuration in ramstage*/ |
| 9 | static const struct soc_amd_gpio base_gpio_table[] = { |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 10 | /* PWR_BTN_L */ |
| 11 | PAD_NF(GPIO_0, PWR_BTN_L, PULL_NONE), |
| 12 | /* SYS_RESET_L */ |
| 13 | PAD_NF(GPIO_1, SYS_RESET_L, PULL_NONE), |
| 14 | /* WAKE_L */ |
Felix Held | f8e440c | 2021-03-24 00:17:35 +0100 | [diff] [blame^] | 15 | PAD_NF_SCI(GPIO_2, WAKE_L, PULL_NONE, EDGE_LOW), |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 16 | /* GSC_SOC_INT_L */ |
| 17 | PAD_INT(GPIO_3, PULL_NONE, EDGE_LOW, STATUS_DELIVERY), |
| 18 | /* SOC_PEN_DETECT_ODL */ |
| 19 | PAD_WAKE(GPIO_4, PULL_NONE, EDGE_HIGH, S0i3), |
| 20 | /* EN_PP5000_PEN */ |
| 21 | PAD_GPO(GPIO_5, LOW), |
| 22 | /* EN_PP3300_WLAN */ |
Martin Roth | 3db4992 | 2021-04-05 17:35:59 -0600 | [diff] [blame] | 23 | PAD_GPO(GPIO_6, HIGH), |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 24 | /* EN_PP3300_TCHPAD */ |
Karthikeyan Ramasubramanian | 0f41912 | 2021-03-30 15:34:47 -0600 | [diff] [blame] | 25 | PAD_GPO(GPIO_7, HIGH), |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 26 | /* EN_PWR_WWAN_X */ |
Martin Roth | 3db4992 | 2021-04-05 17:35:59 -0600 | [diff] [blame] | 27 | PAD_GPO(GPIO_8, HIGH), |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 28 | /* SOC_TCHPAD_INT_ODL */ |
| 29 | PAD_INT(GPIO_9, PULL_NONE, EDGE_HIGH, STATUS_DELIVERY), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 30 | /* S0A3 */ |
| 31 | PAD_NF(GPIO_10, S0A3, PULL_NONE), |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 32 | /* SOC_FP_RST_L */ |
| 33 | PAD_GPO(GPIO_11, LOW), |
| 34 | /* SLP_S3_GATED */ |
| 35 | PAD_GPO(GPIO_12, LOW), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 36 | /* GPIO_13 - GPIO_15: Not available */ |
| 37 | /* USB_OC0_L */ |
| 38 | PAD_NF(GPIO_16, USB_OC0_L, PULL_NONE), |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 39 | /* SOC_SAR_INT_L */ |
| 40 | PAD_INT(GPIO_17, PULL_NONE, EDGE_LOW, STATUS_DELIVERY), |
| 41 | /* WWAN_AUX_RESET_L */ |
| 42 | PAD_GPO(GPIO_18, LOW), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 43 | /* I2C3_SCL */ |
| 44 | PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE), |
| 45 | /* I2C3_SDA */ |
| 46 | PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE), |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 47 | /* SOC_FP_INT_L */ |
| 48 | PAD_INT(GPIO_21, PULL_NONE, EDGE_LOW, STATUS_DELIVERY), |
| 49 | /* EC_SOC_WAKE_ODL */ |
| 50 | PAD_WAKE(GPIO_22, PULL_NONE, EDGE_LOW, S0i3), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 51 | /* AC_PRES */ |
| 52 | PAD_NF(GPIO_23, AC_PRES, PULL_UP), |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 53 | /* WWAN_RST_L */ |
Martin Roth | 3db4992 | 2021-04-05 17:35:59 -0600 | [diff] [blame] | 54 | PAD_GPO(GPIO_24, HIGH), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 55 | /* GPIO_25: Not available */ |
| 56 | /* PCIE_RST0_L */ |
Martin Roth | 6324198 | 2021-03-21 18:45:16 -0600 | [diff] [blame] | 57 | /* TODO: change back to PCIE_RST_L when we figure out why PCIE_RST doesn't go high. */ |
| 58 | PAD_GPO(GPIO_26, HIGH), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 59 | /* PCIE_RST1_L */ |
| 60 | PAD_NF(GPIO_27, PCIE_RST1_L, PULL_NONE), |
| 61 | /* GPIO_28: Not available */ |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 62 | /* WLAN_AUX_RESET */ |
Martin Roth | 3db4992 | 2021-04-05 17:35:59 -0600 | [diff] [blame] | 63 | PAD_GPO(GPIO_29, LOW), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 64 | /* ESPI_CS_L */ |
| 65 | PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE), |
| 66 | /* SPI_CS3_L */ |
| 67 | PAD_NF(GPIO_31, SPI_CS3_L, PULL_NONE), |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 68 | /* EN_PWR_FP */ |
| 69 | PAD_GPO(GPIO_32, LOW), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 70 | /* GPIO_33 - GPIO_39: Not available */ |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 71 | /* SSD_AUX_RESET_L */ |
Martin Roth | 3db4992 | 2021-04-05 17:35:59 -0600 | [diff] [blame] | 72 | PAD_GPO(GPIO_40, HIGH), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 73 | /* GPIO_41: Not available */ |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 74 | /* WWAN_DPR_SAR_ODL */ |
| 75 | PAD_GPO(GPIO_42, LOW), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 76 | /* GPIO_43 - GPIO_66: Not available */ |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 77 | /* SOC_BIOS_WP_L */ |
| 78 | PAD_GPI(GPIO_67, PULL_NONE), |
| 79 | /* EN_PP3300_TCHSCR */ |
| 80 | PAD_GPO(GPIO_68, LOW), |
| 81 | /* EN_SPKR */ |
| 82 | PAD_GPO(GPIO_69, LOW), |
| 83 | /* SD_AUX_RESET_L */ |
Martin Roth | 3db4992 | 2021-04-05 17:35:59 -0600 | [diff] [blame] | 84 | PAD_GPO(GPIO_70, HIGH), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 85 | /* GPIO_71 - GPIO_73: Not available */ |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 86 | /* RAM_ID_CHAN_SEL */ |
| 87 | PAD_GPI(GPIO_74, PULL_NONE), |
| 88 | /* RAM_ID_2 / DEV_BEEP_LRCLK */ |
| 89 | PAD_GPI(GPIO_75, PULL_NONE), |
| 90 | /* EN_PP3300_CAM */ |
Ivy Jian | 7a347af | 2021-04-01 17:22:48 +0800 | [diff] [blame] | 91 | PAD_GPO(GPIO_76, HIGH), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 92 | /* GPIO_77 - GPIO_83: Not available */ |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 93 | /* EC_SOC_INT_ODL */ |
| 94 | PAD_GPI(GPIO_84, PULL_NONE), |
| 95 | /* WWAN_DISABLE */ |
Martin Roth | 3db4992 | 2021-04-05 17:35:59 -0600 | [diff] [blame] | 96 | PAD_GPO(GPIO_85, LOW), |
Martin Roth | 6324198 | 2021-03-21 18:45:16 -0600 | [diff] [blame] | 97 | /* ESPI_SOC_CLK */ |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 98 | PAD_NF(GPIO_86, SPI_CLK, PULL_NONE), |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 99 | /* RAM_ID_1 / DEV_BEEP_DATA */ |
| 100 | PAD_GPI(GPIO_87, PULL_NONE), |
| 101 | /* RAM_ID_3 / DEV_BEEP_BCLK */ |
| 102 | PAD_GPI(GPIO_88, PULL_NONE), |
| 103 | /* TCHSCR_INT_ODL */ |
| 104 | PAD_GPI(GPIO_89, PULL_NONE), |
| 105 | /* HP_INT_ODL */ |
| 106 | PAD_GPI(GPIO_90, PULL_NONE), |
| 107 | /* SD_EX_PRSNT_L */ |
| 108 | PAD_GPI(GPIO_91, PULL_NONE), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 109 | /* CLK_REQ0_L */ |
| 110 | PAD_NF(GPIO_92, CLK_REQ0_L, PULL_NONE), |
| 111 | /* GPIO_93 - GPIO_103: Not available */ |
Mathew King | 447a681 | 2021-03-16 13:04:26 -0600 | [diff] [blame] | 112 | /* ESPI1_DATA0 */ |
| 113 | PAD_NF(GPIO_104, SPI2_DO_ESPI2_D0, PULL_NONE), |
| 114 | /* ESPI1_DATA1 */ |
| 115 | PAD_NF(GPIO_105, SPI2_DI_ESPI2_D1, PULL_NONE), |
| 116 | /* ESPI1_DATA2 */ |
| 117 | PAD_NF(GPIO_106, EMMC_SPI2_WP_L_ESPI2_D2, PULL_NONE), |
| 118 | /* ESPI1_DATA3 */ |
| 119 | PAD_NF(GPIO_107, SPI2_HOLD_L_ESPI2_D3, PULL_NONE), |
Martin Roth | 6324198 | 2021-03-21 18:45:16 -0600 | [diff] [blame] | 120 | /* ESPI_ALERT_L */ |
| 121 | PAD_NF(GPIO_108, ESPI_ALERT_D1, PULL_NONE), |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 122 | /* RAM_ID_0 / DEV_BEEP_EN */ |
| 123 | PAD_GPI(GPIO_109, PULL_NONE), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 124 | /* GPIO_110 - GPIO_112: Not available */ |
| 125 | /* I2C2_SCL */ |
| 126 | PAD_NF(GPIO_113, I2C2_SCL, PULL_NONE), |
| 127 | /* I2C2_SDA */ |
| 128 | PAD_NF(GPIO_114, I2C2_SDA, PULL_NONE), |
| 129 | /* CLK_REQ1_L */ |
| 130 | PAD_NF(GPIO_115, CLK_REQ1_L, PULL_NONE), |
| 131 | /* CLK_REQ2_L */ |
| 132 | PAD_NF(GPIO_116, CLK_REQ2_L, PULL_NONE), |
| 133 | /* GPIO_117 - GPIO_119: Not available */ |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 134 | /* TCHSCR_REPORT_EN */ |
| 135 | PAD_GPO(GPIO_120, LOW), |
| 136 | /* TCHSCR_RESET_L */ |
| 137 | PAD_GPO(GPIO_121, LOW), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 138 | /* GPIO_122 - GPIO_128: Not available */ |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 139 | /* SOC_DISABLE_DISP_BL */ |
| 140 | PAD_GPO(GPIO_129, LOW), |
| 141 | /* WLAN_DISABLE */ |
Martin Roth | 3db4992 | 2021-04-05 17:35:59 -0600 | [diff] [blame] | 142 | PAD_GPO(GPIO_130, LOW), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 143 | /* CLK_REQ3_L */ |
| 144 | PAD_NF(GPIO_131, CLK_REQ3_L, PULL_NONE), |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 145 | /* BT_DISABLE */ |
Karthikeyan Ramasubramanian | d84ce40 | 2021-03-30 16:27:59 -0600 | [diff] [blame] | 146 | PAD_GPO(GPIO_132, LOW), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 147 | /* UART1_TXD */ |
| 148 | PAD_NF(GPIO_140, UART1_TXD, PULL_NONE), |
| 149 | /* UART0_RXD */ |
| 150 | PAD_NF(GPIO_141, UART0_RXD, PULL_NONE), |
| 151 | /* UART1_RXD */ |
| 152 | PAD_NF(GPIO_142, UART1_RXD, PULL_NONE), |
| 153 | /* UART0_TXD */ |
| 154 | PAD_NF(GPIO_143, UART0_TXD, PULL_NONE), |
Mathew King | 91a2cd4 | 2021-02-09 14:28:50 -0700 | [diff] [blame] | 155 | /* SOC_FPMCU_BOOT0 */ |
| 156 | PAD_GPO(GPIO_144, LOW), |
Mathew King | 6109c2c | 2021-01-28 14:55:12 -0700 | [diff] [blame] | 157 | /* I2C0_SCL */ |
| 158 | PAD_NF(GPIO_145, I2C0_SCL, PULL_NONE), |
| 159 | /* I2C0_SDA */ |
| 160 | PAD_NF(GPIO_146, I2C0_SDA, PULL_NONE), |
| 161 | /* I2C1_SCL */ |
| 162 | PAD_NF(GPIO_147, I2C1_SCL, PULL_NONE), |
| 163 | /* I2C1_SDA */ |
| 164 | PAD_NF(GPIO_148, I2C1_SDA, PULL_NONE), |
Mathew King | 10dd775 | 2021-01-26 16:08:14 -0700 | [diff] [blame] | 165 | }; |
| 166 | |
Mathew King | d490afb | 2021-03-11 08:25:52 -0700 | [diff] [blame] | 167 | /* Early GPIO configuration */ |
| 168 | static const struct soc_amd_gpio early_gpio_table[] = { |
Martin Roth | 3db4992 | 2021-04-05 17:35:59 -0600 | [diff] [blame] | 169 | /* EN_PP3300_WLAN */ |
| 170 | PAD_GPO(GPIO_6, HIGH), |
| 171 | /* EN_PWR_WWAN_X */ |
| 172 | PAD_GPO(GPIO_8, HIGH), |
| 173 | /* WWAN_DISABLE */ |
| 174 | PAD_GPO(GPIO_85, LOW), |
| 175 | /* WLAN_DISABLE */ |
| 176 | PAD_GPO(GPIO_130, LOW), |
Karthikeyan Ramasubramanian | 8f7fca5 | 2021-03-15 10:31:37 -0600 | [diff] [blame] | 177 | /* GSC_SOC_INT_L */ |
| 178 | PAD_INT(GPIO_3, PULL_NONE, EDGE_LOW, STATUS_DELIVERY), |
| 179 | /* I2C3_SCL */ |
| 180 | PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE), |
| 181 | /* I2C3_SDA */ |
| 182 | PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE), |
Martin Roth | 6324198 | 2021-03-21 18:45:16 -0600 | [diff] [blame] | 183 | /* PCIE_RST0_L */ |
| 184 | PAD_GPO(GPIO_26, HIGH), |
| 185 | /* ESPI_CS_L */ |
| 186 | PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE), |
| 187 | /* ESPI_SOC_CLK */ |
| 188 | PAD_NF(GPIO_86, SPI_CLK, PULL_NONE), |
Mathew King | d5baf6d | 2021-03-05 08:56:59 -0700 | [diff] [blame] | 189 | /* ESPI1_DATA0 */ |
| 190 | PAD_NF(GPIO_104, SPI2_DO_ESPI2_D0, PULL_NONE), |
| 191 | /* ESPI1_DATA1 */ |
| 192 | PAD_NF(GPIO_105, SPI2_DI_ESPI2_D1, PULL_NONE), |
| 193 | /* ESPI1_DATA2 */ |
| 194 | PAD_NF(GPIO_106, EMMC_SPI2_WP_L_ESPI2_D2, PULL_NONE), |
| 195 | /* ESPI1_DATA3 */ |
| 196 | PAD_NF(GPIO_107, SPI2_HOLD_L_ESPI2_D3, PULL_NONE), |
| 197 | /* ESPI_ALERT_L */ |
| 198 | PAD_NF(GPIO_108, ESPI_ALERT_D1, PULL_NONE), |
Mathew King | cec5245 | 2021-03-16 12:49:26 -0600 | [diff] [blame] | 199 | /* UART0_RXD */ |
| 200 | PAD_NF(GPIO_141, UART0_RXD, PULL_NONE), |
| 201 | /* UART0_TXD */ |
| 202 | PAD_NF(GPIO_143, UART0_TXD, PULL_NONE), |
Mathew King | 10dd775 | 2021-01-26 16:08:14 -0700 | [diff] [blame] | 203 | }; |
| 204 | |
Mathew King | ee10ce6 | 2021-03-04 15:34:37 -0700 | [diff] [blame] | 205 | /* GPIO configuration for sleep */ |
| 206 | static const struct soc_amd_gpio sleep_gpio_table[] = { |
| 207 | /* TODO: Fill sleep gpio configuration */ |
| 208 | }; |
| 209 | |
Mathew King | 10dd775 | 2021-01-26 16:08:14 -0700 | [diff] [blame] | 210 | const struct soc_amd_gpio *__weak variant_base_gpio_table(size_t *size) |
| 211 | { |
| 212 | *size = ARRAY_SIZE(base_gpio_table); |
| 213 | return base_gpio_table; |
| 214 | } |
| 215 | const struct soc_amd_gpio *__weak variant_override_gpio_table(size_t *size) |
| 216 | { |
| 217 | *size = 0; |
| 218 | return NULL; |
| 219 | } |
| 220 | |
Mathew King | d490afb | 2021-03-11 08:25:52 -0700 | [diff] [blame] | 221 | const struct soc_amd_gpio *__weak variant_early_gpio_table(size_t *size) |
Mathew King | 10dd775 | 2021-01-26 16:08:14 -0700 | [diff] [blame] | 222 | { |
Mathew King | d490afb | 2021-03-11 08:25:52 -0700 | [diff] [blame] | 223 | *size = ARRAY_SIZE(early_gpio_table); |
| 224 | return early_gpio_table; |
Mathew King | 10dd775 | 2021-01-26 16:08:14 -0700 | [diff] [blame] | 225 | } |
Mathew King | ee10ce6 | 2021-03-04 15:34:37 -0700 | [diff] [blame] | 226 | |
| 227 | const __weak struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size) |
| 228 | { |
| 229 | *size = ARRAY_SIZE(sleep_gpio_table); |
| 230 | return sleep_gpio_table; |
| 231 | } |