blob: db77f11e3481f4961560eaf4277702ec721cd677 [file] [log] [blame]
Damien Zammit62477932015-05-03 21:34:38 +10001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2007-2009 coresystems GmbH
5## Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
6##
7## This program is free software; you can redistribute it and/or modify
8## it under the terms of the GNU General Public License as published by
9## the Free Software Foundation; version 2 of the License.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
16
17config NORTHBRIDGE_INTEL_PINEVIEW
18 bool
19
20if NORTHBRIDGE_INTEL_PINEVIEW
21
22config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
23 def_bool y
Damien Zammit62477932015-05-03 21:34:38 +100024 select HAVE_DEBUG_RAM_SETUP
25 select LAPIC_MONOTONIC_TIMER
Damien Zammit51fdb922016-01-18 18:34:52 +110026 select VGA
27 select MAINBOARD_HAS_NATIVE_VGA_INIT
Arthur Heymansf6cf3a82017-04-21 16:22:44 +020028 select RELOCATABLE_RAMSTAGE
Damien Zammit51fdb922016-01-18 18:34:52 +110029
30config MAINBOARD_DO_NATIVE_VGA_INIT
31 def_bool y
32 select INTEL_EDID
Damien Zammit62477932015-05-03 21:34:38 +100033
34config BOOTBLOCK_NORTHBRIDGE_INIT
35 string
36 default "northbridge/intel/pineview/bootblock.c"
37
38config VGA_BIOS_ID
39 string
40 default "8086,a001"
41
42endif