blob: cb5f569eec73513cbc110d06d14eede5f79935c7 [file] [log] [blame]
Subrata Banik20fe24b2021-12-09 02:46:38 +05301/** @file
2 MM PCI Root Bridge IO protocol as defined in the PI 1.5 specification.
3
4 This protocol provides PCI I/O and memory access within MM.
5
6 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
7 SPDX-License-Identifier: BSD-2-Clause-Patent
8
9**/
10
11#ifndef _MM_PCI_ROOT_BRIDGE_IO_H_
12#define _MM_PCI_ROOT_BRIDGE_IO_H_
13
14#include <Protocol/PciRootBridgeIo.h>
15
16#define EFI_MM_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \
17 { \
18 0x8bc1714d, 0xffcb, 0x41c3, { 0x89, 0xdc, 0x6c, 0x74, 0xd0, 0x6d, 0x98, 0xea } \
19 }
20
21///
22/// This protocol provides the same functionality as the PCI Root Bridge I/O Protocol defined in the
23/// UEFI 2.1 Specifcation, section 13.2, except that the functions for Map() and Unmap() may return
24/// EFI_UNSUPPORTED.
25///
26typedef EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL EFI_MM_PCI_ROOT_BRIDGE_IO_PROTOCOL;
27
28extern EFI_GUID gEfiMmPciRootBridgeIoProtocolGuid;
29
30#endif
31