Felix Held | 153f92a | 2020-12-08 17:27:30 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #include <amdblocks/acpimmio.h> |
Zheng Bao | 9194760 | 2021-01-27 15:47:58 +0800 | [diff] [blame] | 4 | #include <amdblocks/espi.h> |
Zheng Bao | b0f00ed | 2021-03-16 15:28:49 +0800 | [diff] [blame] | 5 | #include <amdblocks/i2c.h> |
Karthikeyan Ramasubramanian | f62bbc8 | 2021-03-30 15:19:12 -0600 | [diff] [blame^] | 6 | #include <amdblocks/lpc.h> |
| 7 | #include <amdblocks/pmlib.h> |
| 8 | #include <amdblocks/smbus.h> |
Felix Held | 153f92a | 2020-12-08 17:27:30 +0100 | [diff] [blame] | 9 | #include <console/console.h> |
Zheng Bao | b0f00ed | 2021-03-16 15:28:49 +0800 | [diff] [blame] | 10 | #include <soc/i2c.h> |
Felix Held | 153f92a | 2020-12-08 17:27:30 +0100 | [diff] [blame] | 11 | #include <soc/southbridge.h> |
Felix Held | 8a3d4d5 | 2021-01-13 03:06:21 +0100 | [diff] [blame] | 12 | #include <soc/uart.h> |
Felix Held | 153f92a | 2020-12-08 17:27:30 +0100 | [diff] [blame] | 13 | |
Zheng Bao | b0f00ed | 2021-03-16 15:28:49 +0800 | [diff] [blame] | 14 | #include "chip.h" |
| 15 | |
| 16 | /* This table is for the initial conversion of all SCL pins to input with no pull. */ |
| 17 | static const struct soc_i2c_scl_pin i2c_scl_pins[] = { |
| 18 | { PAD_GPI(I2C0_SCL_PIN, PULL_NONE), GPIO_I2C0_SCL }, |
| 19 | { PAD_GPI(I2C1_SCL_PIN, PULL_NONE), GPIO_I2C1_SCL }, |
| 20 | { PAD_GPI(I2C2_SCL_PIN, PULL_NONE), GPIO_I2C2_SCL }, |
| 21 | { PAD_GPI(I2C3_SCL_PIN, PULL_NONE), GPIO_I2C3_SCL }, |
| 22 | }; |
| 23 | |
| 24 | static void reset_i2c_peripherals(void) |
| 25 | { |
| 26 | const struct soc_amd_cezanne_config *cfg = config_of_soc(); |
| 27 | struct soc_i2c_peripheral_reset_info reset_info; |
| 28 | |
| 29 | reset_info.i2c_scl_reset_mask = cfg->i2c_scl_reset & GPIO_I2C_MASK; |
| 30 | reset_info.i2c_scl = i2c_scl_pins; |
| 31 | reset_info.num_pins = ARRAY_SIZE(i2c_scl_pins); |
| 32 | sb_reset_i2c_peripherals(&reset_info); |
| 33 | } |
| 34 | |
Felix Held | 153f92a | 2020-12-08 17:27:30 +0100 | [diff] [blame] | 35 | /* Before console init */ |
| 36 | void fch_pre_init(void) |
| 37 | { |
Zheng Bao | 3da5569 | 2021-01-26 18:30:18 +0800 | [diff] [blame] | 38 | lpc_early_init(); |
| 39 | |
Felix Held | 153f92a | 2020-12-08 17:27:30 +0100 | [diff] [blame] | 40 | enable_acpimmio_decode_pm04(); |
| 41 | fch_smbus_init(); |
| 42 | fch_enable_cf9_io(); |
| 43 | fch_enable_legacy_io(); |
Raul E Rangel | b825acb | 2021-02-24 16:21:00 -0700 | [diff] [blame] | 44 | fch_disable_legacy_dma_io(); |
Felix Held | 62ef88f | 2020-12-08 23:18:19 +0100 | [diff] [blame] | 45 | enable_aoac_devices(); |
Zheng Bao | b0f00ed | 2021-03-16 15:28:49 +0800 | [diff] [blame] | 46 | reset_i2c_peripherals(); |
Felix Held | 8a3d4d5 | 2021-01-13 03:06:21 +0100 | [diff] [blame] | 47 | |
| 48 | /* |
| 49 | * On reset Range_0 defaults to enabled. We want to start with a clean |
| 50 | * slate to not have things unexpectedly enabled. |
| 51 | */ |
| 52 | clear_uart_legacy_config(); |
| 53 | |
| 54 | if (CONFIG(AMD_SOC_CONSOLE_UART)) |
| 55 | set_uart_config(CONFIG_UART_FOR_CONSOLE); |
Felix Held | 27b295b | 2021-03-25 01:20:41 +0100 | [diff] [blame] | 56 | |
| 57 | /* disable the keyboard reset function before mainboard GPIO setup */ |
| 58 | if (CONFIG(DISABLE_KEYBOARD_RESET_PIN)) |
| 59 | fch_disable_kb_rst(); |
Felix Held | 153f92a | 2020-12-08 17:27:30 +0100 | [diff] [blame] | 60 | } |
| 61 | |
| 62 | /* After console init */ |
| 63 | void fch_early_init(void) |
| 64 | { |
Karthikeyan Ramasubramanian | f62bbc8 | 2021-03-30 15:19:12 -0600 | [diff] [blame^] | 65 | pm_set_power_failure_state(); |
Felix Held | 153f92a | 2020-12-08 17:27:30 +0100 | [diff] [blame] | 66 | fch_print_pmxc0_status(); |
Zheng Bao | 7b13e4e | 2021-03-16 16:13:56 +0800 | [diff] [blame] | 67 | i2c_soc_early_init(); |
Zheng Bao | 9194760 | 2021-01-27 15:47:58 +0800 | [diff] [blame] | 68 | |
Raul E Rangel | 95b3dc3 | 2021-03-24 16:53:37 -0600 | [diff] [blame] | 69 | if (CONFIG(DISABLE_SPI_FLASH_ROM_SHARING)) |
| 70 | lpc_disable_spi_rom_sharing(); |
| 71 | |
Raul E Rangel | b95f848 | 2021-04-02 13:47:09 -0600 | [diff] [blame] | 72 | if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) |
Zheng Bao | 9194760 | 2021-01-27 15:47:58 +0800 | [diff] [blame] | 73 | espi_setup(); |
Felix Held | 153f92a | 2020-12-08 17:27:30 +0100 | [diff] [blame] | 74 | } |