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review.coreboot.org / coreboot / f4c496d3e3e779b3d870d13e1e359a3b5f7087cb / . / src / soc / ucb / riscv / chip.c
blob: 187e96d274451f5a0b448c4b4a8cedea1c7127d7 [file] [log] [blame]
Kyösti Mälkkide274992020-05-26 09:31:41 +0300[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <device/device.h>
4
5struct chip_operations soc_ucb_riscv_ops = {
6 CHIP_NAME("UCB RISC-V")
7};