Angel Pons | 7c1d70e | 2020-04-04 18:51:19 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Vadim Bendebury | 41a5d0d | 2014-05-13 17:47:57 -0700 | [diff] [blame] | 2 | |
| 3 | #include <console/console.h> |
| 4 | #include <device/device.h> |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 5 | #include <symbols.h> |
Vadim Bendebury | 7c25640 | 2015-01-13 13:07:48 -0800 | [diff] [blame] | 6 | #include <soc/ipq_uart.h> |
David Hendricks | 2445274 | 2014-07-02 13:50:57 -0700 | [diff] [blame] | 7 | |
Kyösti Mälkki | f35c074 | 2021-06-26 14:12:54 +0300 | [diff] [blame] | 8 | #define RESERVED_SIZE 0x01500000 /* 21 MiB */ |
David Hendricks | 2445274 | 2014-07-02 13:50:57 -0700 | [diff] [blame] | 9 | |
Elyes HAOUAS | d6cd255 | 2018-05-25 10:01:13 +0200 | [diff] [blame] | 10 | static void soc_read_resources(struct device *dev) |
Vadim Bendebury | 41a5d0d | 2014-05-13 17:47:57 -0700 | [diff] [blame] | 11 | { |
Kyösti Mälkki | f35c074 | 2021-06-26 14:12:54 +0300 | [diff] [blame] | 12 | /* Reserve bottom 21 MiB for NSS, SMEM, etc. */ |
| 13 | uintptr_t reserve_ram_end = (uintptr_t)_dram + RESERVED_SIZE; |
| 14 | uint64_t ram_end = CONFIG_DRAM_SIZE_MB * (uint64_t)MiB; |
| 15 | |
| 16 | reserved_ram_from_to(dev, 0, (uintptr_t)_dram, reserve_ram_end); |
| 17 | ram_from_to(dev, 1, reserve_ram_end, ram_end); |
Vadim Bendebury | 41a5d0d | 2014-05-13 17:47:57 -0700 | [diff] [blame] | 18 | } |
| 19 | |
Elyes HAOUAS | d6cd255 | 2018-05-25 10:01:13 +0200 | [diff] [blame] | 20 | static void soc_init(struct device *dev) |
Vadim Bendebury | 41a5d0d | 2014-05-13 17:47:57 -0700 | [diff] [blame] | 21 | { |
Vadim Bendebury | 7c25640 | 2015-01-13 13:07:48 -0800 | [diff] [blame] | 22 | /* |
| 23 | * Do this in case console is not enabled: kernel's earlyprintk() |
| 24 | * should work no matter what the firmware console configuration is. |
| 25 | */ |
| 26 | ipq806x_uart_init(); |
| 27 | |
Vadim Bendebury | 41a5d0d | 2014-05-13 17:47:57 -0700 | [diff] [blame] | 28 | printk(BIOS_INFO, "CPU: Qualcomm 8064\n"); |
| 29 | } |
| 30 | |
| 31 | static struct device_operations soc_ops = { |
| 32 | .read_resources = soc_read_resources, |
| 33 | .init = soc_init, |
| 34 | }; |
| 35 | |
Elyes HAOUAS | d6cd255 | 2018-05-25 10:01:13 +0200 | [diff] [blame] | 36 | static void enable_soc_dev(struct device *dev) |
Vadim Bendebury | 41a5d0d | 2014-05-13 17:47:57 -0700 | [diff] [blame] | 37 | { |
| 38 | dev->ops = &soc_ops; |
| 39 | } |
| 40 | |
| 41 | struct chip_operations soc_qualcomm_ipq806x_ops = { |
| 42 | CHIP_NAME("SOC Qualcomm 8064") |
| 43 | .enable_dev = enable_soc_dev, |
| 44 | }; |