blob: 8c40c49d4fe82abd345329eba71926d256195480 [file] [log] [blame]
Ben Chuange9878452021-11-18 16:33:05 +08001/* SPDX-License-Identifier: GPL-2.0-only */
2
3/* Driver for Genesys Logic GL9750 */
4
5#include <console/console.h>
6#include <device/device.h>
7#include <device/pci.h>
8#include <device/pci_ops.h>
9#include <device/pci_ids.h>
10#include "gl9750.h"
11
12static void gl9750_enable(struct device *dev)
13{
14 printk(BIOS_INFO, "GL9750: configure ASPM\n");
15
16 /* Set Vendor Config to be configurable */
17 pci_or_config32(dev, CFG, CFG_EN);
18
19 /*
20 * When both ASPM L0s and L1 are supported, GL9750 may not enter L1.
21 * So disable L0s support.
22 */
23 pci_and_config32(dev, CFG2, ~CFG2_L0S_SUPPORT);
24
Ben Chuangdf98e6b2023-08-21 11:01:04 +080025 if (CONFIG(DRIVERS_GENESYSLOGIC_GL9750_INVERT_WP))
26 /* invert write protect polarity */
27 pci_or_config32(dev, CFG1, CFG1_WP_INVERT);
28
Ben Chuange9878452021-11-18 16:33:05 +080029 /* Set Vendor Config to be non-configurable */
30 pci_and_config32(dev, CFG, ~CFG_EN);
31}
32
33static struct device_operations gl9750_ops = {
34 .read_resources = pci_dev_read_resources,
35 .set_resources = pci_dev_set_resources,
36 .enable_resources = pci_dev_enable_resources,
37 .ops_pci = &pci_dev_ops_pci,
38 .enable = gl9750_enable
39};
40
41static const unsigned short pci_device_ids[] = {
Felix Singer43b7f412022-03-07 04:34:52 +010042 PCI_DID_GLI_9750,
Ben Chuange9878452021-11-18 16:33:05 +080043 0
44};
45
46static const struct pci_driver genesyslogic_gl9750 __pci_driver = {
47 .ops = &gl9750_ops,
Felix Singer43b7f412022-03-07 04:34:52 +010048 .vendor = PCI_VID_GLI,
Ben Chuange9878452021-11-18 16:33:05 +080049 .devices = pci_device_ids,
50};
51
52struct chip_operations drivers_generic_genesyslogic_gl9750_ops = {
53 CHIP_NAME("Genesys Logic GL9750")
54};