David Wu | 305086c | 2022-05-09 01:37:12 +0800 | [diff] [blame] | 1 | fw_config |
| 2 | field KB_BL 0 0 |
| 3 | option KB_BL_ABSENT 0 |
| 4 | option KB_BL_PRESENT 1 |
| 5 | end |
David Wu | 305086c | 2022-05-09 01:37:12 +0800 | [diff] [blame] | 6 | field AUDIO 2 3 |
| 7 | option AUDIO_UNKNOWN 0 |
| 8 | option MAX98360_NAU88L25B_I2S 1 |
| 9 | end |
| 10 | end |
David Wu | eb327cb | 2022-04-15 16:11:51 +0800 | [diff] [blame] | 11 | chip soc/intel/alderlake |
David Wu | 9e24f75 | 2023-02-24 12:51:53 +0800 | [diff] [blame] | 12 | register "domain_vr_config[VR_DOMAIN_IA]" = "{ |
| 13 | .enable_fast_vmode = 1, |
| 14 | }" |
| 15 | |
David Wu | 305086c | 2022-05-09 01:37:12 +0800 | [diff] [blame] | 16 | register "sagv" = "SaGv_Enabled" |
David Wu | eb327cb | 2022-04-15 16:11:51 +0800 | [diff] [blame] | 17 | |
David Wu | e910fba | 2022-06-23 09:45:11 +0800 | [diff] [blame] | 18 | # As per Intel Advisory doc#723158, the change is required to prevent possible |
| 19 | # display flickering issue. |
| 20 | register "usb2_phy_sus_pg_disable" = "1" |
| 21 | |
David Wu | 305086c | 2022-05-09 01:37:12 +0800 | [diff] [blame] | 22 | register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2_C1 |
| 23 | register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable M.2 WWAN |
David Wu | eb327cb | 2022-04-15 16:11:51 +0800 | [diff] [blame] | 24 | |
David Wu | 305086c | 2022-05-09 01:37:12 +0800 | [diff] [blame] | 25 | register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Disable M.2 WWAN |
| 26 | |
| 27 | # FIVR configurations are disabled since the board doesn't have V1p05 and Vnn |
| 28 | # bypass rails implemented. |
| 29 | register "ext_fivr_settings" = "{ |
| 30 | .configure_ext_fivr = 1, |
| 31 | }" |
| 32 | |
| 33 | # Intel Common SoC Config |
| 34 | #+-------------------+---------------------------+ |
| 35 | #| Field | Value | |
| 36 | #+-------------------+---------------------------+ |
| 37 | #| I2C0 | Audio | |
| 38 | #| I2C1 | cr50 TPM. Early init is | |
| 39 | #| | required to set up a BAR | |
| 40 | #| | for TPM communication | |
| 41 | #| I2C5 | Trackpad | |
| 42 | #+-------------------+---------------------------+ |
| 43 | |
| 44 | register "common_soc_config" = "{ |
| 45 | .i2c[0] = { |
| 46 | .speed = I2C_SPEED_FAST, |
| 47 | .rise_time_ns = 650, |
| 48 | .fall_time_ns = 400, |
| 49 | .data_hold_time_ns = 50, |
| 50 | }, |
| 51 | .i2c[1] = { |
| 52 | .early_init = 1, |
| 53 | .speed = I2C_SPEED_FAST, |
| 54 | .rise_time_ns = 600, |
| 55 | .fall_time_ns = 400, |
| 56 | .data_hold_time_ns = 50, |
| 57 | }, |
| 58 | .i2c[5] = { |
| 59 | .speed = I2C_SPEED_FAST, |
| 60 | .rise_time_ns = 650, |
| 61 | .fall_time_ns = 400, |
| 62 | .data_hold_time_ns = 50, |
| 63 | }, |
| 64 | }" |
| 65 | |
| 66 | device domain 0 on |
Won Chung | f860d5a | 2023-07-31 22:52:28 +0000 | [diff] [blame] | 67 | device ref igpu on |
| 68 | chip drivers/gfx/generic |
| 69 | register "device_count" = "6" |
| 70 | # DDIA for eDP |
| 71 | register "device[0].name" = ""LCD"" |
| 72 | # DDIB for HDMI |
| 73 | register "device[1].name" = ""DD01"" |
| 74 | # TCP0 (DP-1) for port C0 |
| 75 | register "device[2].name" = ""DD02"" |
| 76 | register "device[2].use_pld" = "true" |
| 77 | register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" |
| 78 | # TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1 |
| 79 | register "device[3].name" = ""DD03"" |
| 80 | # TCP2 (DP-3) for port C1 |
| 81 | register "device[4].name" = ""DD04"" |
| 82 | register "device[4].use_pld" = "true" |
| 83 | register "device[4].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" |
| 84 | # TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3 |
| 85 | register "device[5].name" = ""DD05"" |
| 86 | device generic 0 on end |
| 87 | end |
| 88 | end # Integrated Graphics Device |
David Wu | 305086c | 2022-05-09 01:37:12 +0800 | [diff] [blame] | 89 | device ref dtt on |
| 90 | chip drivers/intel/dptf |
| 91 | ## sensor information |
| 92 | register "options.tsr[0].desc" = ""DRAM"" |
| 93 | register "options.tsr[1].desc" = ""Soc"" |
| 94 | register "options.tsr[2].desc" = ""Charger"" |
| 95 | |
| 96 | # TODO: below values are initial reference values only |
| 97 | ## Active Policy |
| 98 | register "policies.active" = "{ |
| 99 | [0] = { |
| 100 | .target = DPTF_CPU, |
| 101 | .thresholds = { |
| 102 | TEMP_PCT(85, 90), |
| 103 | TEMP_PCT(75, 80), |
| 104 | TEMP_PCT(68, 70), |
| 105 | TEMP_PCT(62, 60), |
| 106 | TEMP_PCT(55, 50), |
| 107 | TEMP_PCT(50, 40), |
| 108 | TEMP_PCT(40, 30), |
| 109 | } |
| 110 | }, |
| 111 | [1] = { |
| 112 | .target = DPTF_TEMP_SENSOR_1, |
| 113 | .thresholds = { |
| 114 | TEMP_PCT(60, 90), |
| 115 | TEMP_PCT(55, 80), |
| 116 | TEMP_PCT(52, 70), |
| 117 | TEMP_PCT(48, 60), |
| 118 | TEMP_PCT(44, 50), |
| 119 | TEMP_PCT(40, 40), |
| 120 | TEMP_PCT(36, 30), |
| 121 | } |
| 122 | } |
| 123 | }" |
| 124 | |
| 125 | ## Passive Policy |
| 126 | register "policies.passive" = "{ |
| 127 | [0] = DPTF_PASSIVE(CPU, CPU, 90, 5000), |
| 128 | [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 55, 5000), |
| 129 | [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 55, 5000), |
| 130 | [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 55, 5000), |
| 131 | }" |
| 132 | |
| 133 | ## Critical Policy |
| 134 | register "policies.critical" = "{ |
| 135 | [0] = DPTF_CRITICAL(CPU, 100, SHUTDOWN), |
| 136 | [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN), |
| 137 | [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN), |
| 138 | [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN), |
| 139 | }" |
| 140 | |
| 141 | register "controls.power_limits" = "{ |
| 142 | .pl1 = { |
| 143 | .min_power = 18000, |
| 144 | .max_power = 20000, |
| 145 | .time_window_min = 28 * MSECS_PER_SEC, |
| 146 | .time_window_max = 32 * MSECS_PER_SEC, |
| 147 | .granularity = 200, |
| 148 | }, |
| 149 | .pl2 = { |
| 150 | .min_power = 43000, |
| 151 | .max_power = 43000, |
| 152 | .time_window_min = 28 * MSECS_PER_SEC, |
| 153 | .time_window_max = 32 * MSECS_PER_SEC, |
| 154 | .granularity = 1000, |
| 155 | } |
| 156 | }" |
| 157 | |
| 158 | ## Charger Performance Control (Control, mA) |
| 159 | register "controls.charger_perf" = "{ |
| 160 | [0] = { 255, 1700 }, |
| 161 | [1] = { 24, 1500 }, |
| 162 | [2] = { 16, 1000 }, |
| 163 | [3] = { 8, 500 } |
| 164 | }" |
| 165 | |
| 166 | ## Fan Performance Control (Percent, Speed, Noise, Power) |
| 167 | register "controls.fan_perf" = "{ |
| 168 | [0] = { 90, 6700, 220, 2200, }, |
| 169 | [1] = { 80, 5800, 180, 1800, }, |
| 170 | [2] = { 70, 5000, 145, 1450, }, |
| 171 | [3] = { 60, 4900, 115, 1150, }, |
| 172 | [4] = { 50, 3838, 90, 900, }, |
| 173 | [5] = { 40, 2904, 55, 550, }, |
| 174 | [6] = { 30, 2337, 30, 300, }, |
| 175 | [7] = { 20, 1608, 15, 150, }, |
| 176 | [8] = { 10, 800, 10, 100, }, |
| 177 | [9] = { 0, 0, 0, 50, } |
| 178 | }" |
| 179 | |
| 180 | ## Fan options |
| 181 | register "options.fan.fine_grained_control" = "1" |
| 182 | register "options.fan.step_size" = "2" |
| 183 | |
| 184 | device generic 0 alias dptf_policy on end |
| 185 | end |
| 186 | end |
| 187 | device ref tbt_pcie_rp0 off end |
| 188 | device ref tbt_pcie_rp1 off end |
| 189 | device ref tbt_pcie_rp2 off end |
| 190 | device ref tcss_dma0 off end |
| 191 | device ref tcss_dma1 off end |
| 192 | device ref pcie4_0 on |
| 193 | # Enable CPU PCIE RP 1 using CLK 0 |
| 194 | register "cpu_pcie_rp[CPU_RP(1)]" = "{ |
| 195 | .clk_req = 0, |
| 196 | .clk_src = 0, |
| 197 | .flags = PCIE_RP_LTR | PCIE_RP_AER, |
| 198 | }" |
| 199 | end |
| 200 | device ref cnvi_wifi on |
| 201 | chip drivers/wifi/generic |
| 202 | register "wake" = "GPE0_PME_B0" |
| 203 | device generic 0 on end |
| 204 | end |
| 205 | end |
| 206 | device ref i2c0 on |
| 207 | chip drivers/i2c/nau8825 |
| 208 | register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_A23)" |
| 209 | register "jkdet_enable" = "1" |
| 210 | register "jkdet_pull_enable" = "0" |
| 211 | register "jkdet_pull_up" = "0" |
| 212 | register "jkdet_polarity" = "1" # ActiveLow |
| 213 | register "vref_impedance" = "2" # 125kOhm |
| 214 | register "micbias_voltage" = "6" # 2.754 |
| 215 | register "sar_threshold_num" = "4" |
| 216 | register "sar_threshold[0]" = "0x0C" |
| 217 | register "sar_threshold[1]" = "0x1C" |
| 218 | register "sar_threshold[2]" = "0x38" |
| 219 | register "sar_threshold[3]" = "0x60" |
| 220 | register "sar_hysteresis" = "1" |
| 221 | register "sar_voltage" = "6" |
| 222 | register "sar_compare_time" = "0" # 500ns |
| 223 | register "sar_sampling_time" = "0" # 2us |
| 224 | register "short_key_debounce" = "2" # 100ms |
| 225 | register "jack_insert_debounce" = "7" # 512ms |
| 226 | register "jack_eject_debounce" = "7" # 512ms |
| 227 | device i2c 1a on |
| 228 | probe AUDIO MAX98360_NAU88L25B_I2S |
| 229 | end |
| 230 | end |
| 231 | end #I2C0 |
| 232 | device ref i2c1 on |
| 233 | chip drivers/i2c/tpm |
| 234 | register "hid" = ""GOOG0005"" |
| 235 | register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)" |
| 236 | device i2c 50 on end |
| 237 | end |
| 238 | end |
| 239 | device ref i2c5 on |
| 240 | chip drivers/i2c/generic |
| 241 | register "hid" = ""ELAN0000"" |
| 242 | register "desc" = ""ELAN Touchpad"" |
| 243 | register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)" |
| 244 | register "wake" = "GPE0_DW2_14" |
Matt DeVillier | 2cf52d8 | 2022-09-01 15:09:24 -0500 | [diff] [blame] | 245 | register "detect" = "1" |
David Wu | 305086c | 2022-05-09 01:37:12 +0800 | [diff] [blame] | 246 | device i2c 15 on end |
| 247 | end |
| 248 | chip drivers/i2c/hid |
Matt DeVillier | e9f0ed5 | 2022-12-19 15:06:15 -0600 | [diff] [blame] | 249 | register "generic.hid" = ""SYNA0000"" |
| 250 | register "generic.cid" = ""ACPI0C50"" |
David Wu | 305086c | 2022-05-09 01:37:12 +0800 | [diff] [blame] | 251 | register "generic.desc" = ""Synaptics Touchpad"" |
| 252 | register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)" |
| 253 | register "generic.wake" = "GPE0_DW2_14" |
Matt DeVillier | 2cf52d8 | 2022-09-01 15:09:24 -0500 | [diff] [blame] | 254 | register "generic.detect" = "1" |
David Wu | 305086c | 2022-05-09 01:37:12 +0800 | [diff] [blame] | 255 | register "hid_desc_reg_offset" = "0x20" |
| 256 | device i2c 0x2c on end |
| 257 | end |
| 258 | end |
| 259 | device ref hda on |
| 260 | chip drivers/generic/max98357a |
| 261 | register "hid" = ""MX98360A"" |
| 262 | register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)" |
| 263 | register "sdmode_delay" = "5" |
| 264 | device generic 0 on |
| 265 | probe AUDIO MAX98360_NAU88L25B_I2S |
| 266 | end |
| 267 | end |
Matt DeVillier | 3f3dc50 | 2023-01-17 13:44:23 -0600 | [diff] [blame] | 268 | chip drivers/sof |
| 269 | register "spkr_tplg" = "max98360a" |
| 270 | register "jack_tplg" = "nau8825" |
| 271 | register "mic_tplg" = "_2ch_pdm0" |
| 272 | device generic 0 on end |
| 273 | end |
David Wu | 305086c | 2022-05-09 01:37:12 +0800 | [diff] [blame] | 274 | end |
| 275 | device ref pcie_rp6 off end # PCIE6 WWAN |
| 276 | device ref pcie_rp7 on |
| 277 | chip drivers/net |
| 278 | register "wake" = "GPE0_DW0_07" |
| 279 | register "led_feature" = "0xe0" |
| 280 | register "customized_led0" = "0x23f" |
| 281 | register "customized_led2" = "0x028" |
| 282 | register "enable_aspm_l1_2" = "1" |
Kapil Porwal | 39f5042 | 2022-11-26 02:38:38 +0530 | [diff] [blame] | 283 | register "add_acpi_dma_property" = "true" |
Matt DeVillier | f493857 | 2023-11-01 18:50:25 -0500 | [diff] [blame^] | 284 | device generic 0 on end |
David Wu | 305086c | 2022-05-09 01:37:12 +0800 | [diff] [blame] | 285 | end |
| 286 | # Enable PCIE 7 using clk 6 |
| 287 | register "pch_pcie_rp[PCH_RP(7)]" = "{ |
| 288 | .clk_src = 6, |
| 289 | .clk_req = 6, |
| 290 | .flags = PCIE_RP_LTR | PCIE_RP_AER, |
| 291 | }" |
| 292 | end # RTL8125 Ethernet NIC |
| 293 | device ref pcie_rp8 off end # PCIE8 SD card |
| 294 | device ref pcie_rp9 off end # PCIE9-12 SSD |
| 295 | device ref gspi1 off end |
| 296 | device ref pch_espi on |
| 297 | chip ec/google/chromeec |
| 298 | use conn0 as mux_conn[0] |
| 299 | use conn1 as mux_conn[1] |
| 300 | device pnp 0c09.0 on end |
| 301 | end |
| 302 | end |
| 303 | device ref pmc hidden |
| 304 | chip drivers/intel/pmc_mux |
| 305 | device generic 0 on |
| 306 | chip drivers/intel/pmc_mux/conn |
| 307 | use usb2_port1 as usb2_port |
| 308 | use tcss_usb3_port1 as usb3_port |
| 309 | device generic 0 alias conn0 on end |
| 310 | end |
| 311 | chip drivers/intel/pmc_mux/conn |
| 312 | use usb2_port3 as usb2_port |
| 313 | use tcss_usb3_port3 as usb3_port |
| 314 | device generic 1 alias conn1 on end |
| 315 | end |
| 316 | end |
| 317 | end |
| 318 | end |
| 319 | device ref tcss_xhci on |
| 320 | chip drivers/usb/acpi |
| 321 | device ref tcss_root_hub on |
| 322 | chip drivers/usb/acpi |
| 323 | register "desc" = ""USB3 Type-C Port C0 (MLB)"" |
| 324 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 325 | register "use_custom_pld" = "true" |
| 326 | register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" |
Ron Lee | 558952a | 2022-12-13 19:48:59 +0800 | [diff] [blame] | 327 | register "usb_lpm_incapable" = "true" |
David Wu | 305086c | 2022-05-09 01:37:12 +0800 | [diff] [blame] | 328 | device ref tcss_usb3_port1 on end |
| 329 | end |
| 330 | chip drivers/usb/acpi |
| 331 | register "desc" = ""USB3 Type-C Port C1 (MLB)"" |
| 332 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 333 | register "use_custom_pld" = "true" |
| 334 | register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" |
Ron Lee | 558952a | 2022-12-13 19:48:59 +0800 | [diff] [blame] | 335 | register "usb_lpm_incapable" = "true" |
David Wu | 305086c | 2022-05-09 01:37:12 +0800 | [diff] [blame] | 336 | device ref tcss_usb3_port3 on end |
| 337 | end |
| 338 | end |
| 339 | end |
| 340 | end |
| 341 | device ref xhci on |
| 342 | chip drivers/usb/acpi |
| 343 | device ref xhci_root_hub on |
| 344 | chip drivers/usb/acpi |
| 345 | register "desc" = ""USB2 Type-C Port C0 (MLB)"" |
| 346 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 347 | register "use_custom_pld" = "true" |
| 348 | register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" |
| 349 | device ref usb2_port1 on end |
| 350 | end |
| 351 | chip drivers/usb/acpi |
| 352 | register "desc" = ""USB2 Type-C Port C1 (MLB)"" |
| 353 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 354 | register "use_custom_pld" = "true" |
| 355 | register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" |
| 356 | device ref usb2_port3 on end |
| 357 | end |
| 358 | chip drivers/usb/acpi |
| 359 | register "desc" = ""USB2 Camera"" |
| 360 | register "type" = "UPC_TYPE_INTERNAL" |
| 361 | device ref usb2_port6 on end |
| 362 | end |
| 363 | chip drivers/usb/acpi |
| 364 | register "desc" = ""USB2 Type-A Port A0 (MLB)"" |
| 365 | register "type" = "UPC_TYPE_A" |
| 366 | register "use_custom_pld" = "true" |
| 367 | register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(1, 2))" |
| 368 | device ref usb2_port9 on end |
| 369 | end |
| 370 | chip drivers/usb/acpi |
| 371 | register "desc" = ""USB2 Bluetooth"" |
| 372 | register "type" = "UPC_TYPE_INTERNAL" |
| 373 | register "reset_gpio" = |
| 374 | "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" |
| 375 | device ref usb2_port10 on end |
| 376 | end |
| 377 | chip drivers/usb/acpi |
| 378 | register "desc" = ""USB3 Type-A Port A0 (MLB)"" |
| 379 | register "type" = "UPC_TYPE_USB3_A" |
| 380 | register "use_custom_pld" = "true" |
| 381 | register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(1, 2))" |
| 382 | device ref usb3_port1 on end |
| 383 | end |
| 384 | end |
| 385 | end |
| 386 | end |
| 387 | end |
David Wu | eb327cb | 2022-04-15 16:11:51 +0800 | [diff] [blame] | 388 | end |