Felix Held | 0ffebac | 2021-02-05 22:26:00 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | |
Raul E Rangel | f2df29e | 2021-03-16 13:23:38 -0600 | [diff] [blame^] | 3 | #include <acpi/acpi_device.h> |
| 4 | #include <console/console.h> |
Felix Held | 0ffebac | 2021-02-05 22:26:00 +0100 | [diff] [blame] | 5 | #include <device/device.h> |
| 6 | #include <device/pci.h> |
| 7 | #include <device/pci_ids.h> |
Felix Held | 0810538 | 2021-02-16 18:46:01 +0100 | [diff] [blame] | 8 | #include <device/pciexp.h> |
Raul E Rangel | f2df29e | 2021-03-16 13:23:38 -0600 | [diff] [blame^] | 9 | #include <soc/pci_devs.h> |
| 10 | |
| 11 | static const char *pcie_gpp_acpi_name(const struct device *dev) |
| 12 | { |
| 13 | if (dev->path.type != DEVICE_PATH_PCI) |
| 14 | return NULL; |
| 15 | |
| 16 | switch (dev->path.pci.devfn) { |
| 17 | case PCIE_GPP_1_0_DEVFN: |
| 18 | return "GP10"; |
| 19 | case PCIE_GPP_1_1_DEVFN: |
| 20 | return "GP11"; |
| 21 | case PCIE_GPP_1_2_DEVFN: |
| 22 | return "GP12"; |
| 23 | case PCIE_GPP_2_0_DEVFN: |
| 24 | return "GP20"; |
| 25 | case PCIE_GPP_2_1_DEVFN: |
| 26 | return "GP21"; |
| 27 | case PCIE_GPP_2_2_DEVFN: |
| 28 | return "GP22"; |
| 29 | case PCIE_GPP_2_3_DEVFN: |
| 30 | return "GP23"; |
| 31 | case PCIE_GPP_2_4_DEVFN: |
| 32 | return "GP24"; |
| 33 | case PCIE_GPP_2_5_DEVFN: |
| 34 | return "GP25"; |
| 35 | case PCIE_GPP_2_6_DEVFN: |
| 36 | return "GP26"; |
| 37 | case PCIE_ABC_A_DEVFN: |
| 38 | return "GPPA"; |
| 39 | case PCIE_GPP_B_DEVFN: |
| 40 | return "GPPB"; |
| 41 | case PCIE_GPP_C_DEVFN: |
| 42 | return "GPPC"; |
| 43 | default: |
| 44 | printk(BIOS_ERR, "%s: Unhanded devfn 0x%x\n", __func__, dev->path.pci.devfn); |
| 45 | return NULL; |
| 46 | } |
| 47 | } |
Felix Held | 0ffebac | 2021-02-05 22:26:00 +0100 | [diff] [blame] | 48 | |
| 49 | static struct device_operations internal_pcie_gpp_ops = { |
| 50 | .read_resources = pci_bus_read_resources, |
| 51 | .set_resources = pci_dev_set_resources, |
| 52 | .enable_resources = pci_bus_enable_resources, |
| 53 | .scan_bus = pci_scan_bridge, |
| 54 | .reset_bus = pci_bus_reset, |
Raul E Rangel | f2df29e | 2021-03-16 13:23:38 -0600 | [diff] [blame^] | 55 | .acpi_name = pcie_gpp_acpi_name, |
| 56 | .acpi_fill_ssdt = acpi_device_write_pci_dev, |
Felix Held | 0ffebac | 2021-02-05 22:26:00 +0100 | [diff] [blame] | 57 | }; |
| 58 | |
Felix Held | 0ffebac | 2021-02-05 22:26:00 +0100 | [diff] [blame] | 59 | static const struct pci_driver internal_pcie_gpp_driver __pci_driver = { |
| 60 | .ops = &internal_pcie_gpp_ops, |
| 61 | .vendor = PCI_VENDOR_ID_AMD, |
Felix Held | abeecec | 2021-02-16 18:42:15 +0100 | [diff] [blame] | 62 | .device = PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_BUSABC, |
Felix Held | 0ffebac | 2021-02-05 22:26:00 +0100 | [diff] [blame] | 63 | }; |
Felix Held | 0810538 | 2021-02-16 18:46:01 +0100 | [diff] [blame] | 64 | |
| 65 | static struct device_operations external_pcie_gpp_ops = { |
| 66 | .read_resources = pci_bus_read_resources, |
| 67 | .set_resources = pci_dev_set_resources, |
| 68 | .enable_resources = pci_bus_enable_resources, |
| 69 | .scan_bus = pciexp_scan_bridge, |
| 70 | .reset_bus = pci_bus_reset, |
Raul E Rangel | f2df29e | 2021-03-16 13:23:38 -0600 | [diff] [blame^] | 71 | .acpi_name = pcie_gpp_acpi_name, |
| 72 | .acpi_fill_ssdt = acpi_device_write_pci_dev, |
Felix Held | 0810538 | 2021-02-16 18:46:01 +0100 | [diff] [blame] | 73 | }; |
| 74 | |
| 75 | static const unsigned short external_pci_gpp_ids[] = { |
| 76 | PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_D1, |
| 77 | PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_D2, |
| 78 | 0 |
| 79 | }; |
| 80 | |
| 81 | static const struct pci_driver external_pcie_gpp_driver __pci_driver = { |
| 82 | .ops = &external_pcie_gpp_ops, |
| 83 | .vendor = PCI_VENDOR_ID_AMD, |
| 84 | .devices = external_pci_gpp_ids, |
| 85 | }; |