Gitiles
Code Review Sign In
review.coreboot.org / coreboot / f20c355a1f7b22c8d8540318c5137e438538d63e / . / src / mainboard / google / zork / dsdt.asl
blob: dc4322daeed7c95762cf5b4a0ac1119fbaf97376 [file] [log] [blame]
Raul E Rangelb3c41322020-05-20 14:07:41 -0600[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-or-later */
2
3#include <variant/ec.h>
4
5/* DefinitionBlock Statement */
6#include <acpi/acpi.h>
7
8DefinitionBlock (
Elyes HAOUAS2bfaabc2020-10-01 17:03:55 +0200[diff] [blame]9 "dsdt.aml",
Elyes HAOUAS37509d72020-10-01 17:11:56 +0200[diff] [blame]10 "DSDT",
Elyes HAOUAS90d00de2020-10-05 16:38:53 +0200[diff] [blame]11 ACPI_DSDT_REV_2,
Raul E Rangelb3c41322020-05-20 14:07:41 -0600[diff] [blame]12 OEM_ID,
13 ACPI_TABLE_CREATOR,
14 0x00010001 /* OEM Revision */
15 )
16{ /* Start of ASL file */
Kyösti Mälkkicf246d52021-01-21 08:17:00 +0200[diff] [blame]17 #include <acpi/dsdt_top.asl>
Raul E Rangelb3c41322020-05-20 14:07:41 -0600[diff] [blame]18
Felix Heldc5d71dc2023-01-20 20:47:22 +0100[diff] [blame]19 Name(LIDS, 0)
20
Felix Heldf20c3552023-12-19 22:46:39 +0100[diff] [blame^]21 #include <globalnvs.asl>
22
Felix Heldebb67232022-03-02 15:04:27 +0100[diff] [blame]23 /* Power state notification to ALIB */
24 #include <pnot.asl>
Raul E Rangelb3c41322020-05-20 14:07:41 -0600[diff] [blame]25
26 /* Contains the supported sleep states for this chipset */
Raul E Rangel8e6059d2021-03-03 17:01:46 -0700[diff] [blame]27 #include <soc/amd/common/acpi/sleepstates.asl>
Raul E Rangelb3c41322020-05-20 14:07:41 -0600[diff] [blame]28
Raul E Rangelb3c41322020-05-20 14:07:41 -0600[diff] [blame]29 /* Contains _SWS methods */
Felix Heldfca45352020-06-18 21:14:31 +0200[diff] [blame]30 #include <soc/amd/common/acpi/acpi_wake_source.asl>
Raul E Rangelb3c41322020-05-20 14:07:41 -0600[diff] [blame]31
32 /* System Bus */
33 Scope(\_SB) { /* Start \_SB scope */
34 /* global utility methods expected within the \_SB scope */
35 #include <arch/x86/acpi/globutil.asl>
36
37 /* Describe the SOC */
38 #include <soc.asl>
39
40 } /* End \_SB scope */
41
42 /* Thermal handler */
43 #include <variant/acpi/thermal.asl>
44
Jon Murphyc4e90452022-06-28 10:36:23 -0600[diff] [blame]45 /* ChromeOS Embedded Controller */
Raul E Rangelb3c41322020-05-20 14:07:41 -0600[diff] [blame]46 Scope (\_SB.PCI0.LPCB)
47 {
48 /* ACPI code for EC SuperIO functions */
49 #include <ec/google/chromeec/acpi/superio.asl>
50 /* ACPI code for EC functions */
51 #include <ec/google/chromeec/acpi/ec.asl>
Raul E Rangelb3c41322020-05-20 14:07:41 -0600[diff] [blame]52 }
53}
54/* End of ASL file */