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Raul E Rangelb3c41322020-05-20 14:07:41 -06001/* SPDX-License-Identifier: GPL-2.0-or-later */
2
3#include <baseboard/gpio.h>
4#include <baseboard/variants.h>
5#include <boardid.h>
6#include <gpio.h>
7#include <soc/gpio.h>
8#include <ec/google/chromeec/ec.h>
9
Furquan Shaikhda459c42020-06-18 01:34:48 -070010static const struct soc_amd_gpio morphius_bid1_gpio_set_stage_ram[] = {
11 /* DMIC_SEL */
12 PAD_GPO(GPIO_13, LOW), // Select Camera 1 Dmic
Raul E Rangelb3c41322020-05-20 14:07:41 -060013 /* USB_OC4_L - USB_A1 */
Furquan Shaikhf6b2e6f2020-07-17 15:30:47 -070014 PAD_NF(GPIO_14, USB_OC4_L, PULL_NONE),
Raul E Rangelb3c41322020-05-20 14:07:41 -060015 /* USB_OC2_L - USB A0 */
Furquan Shaikhf6b2e6f2020-07-17 15:30:47 -070016 PAD_NF(GPIO_18, USB_OC2_L, PULL_NONE),
Furquan Shaikh65e11172020-07-21 21:51:27 -070017 /* EN_PWR_WIFI */
18 PAD_GPO(GPIO_29, HIGH),
Furquan Shaikhda459c42020-06-18 01:34:48 -070019 /* EN_PWR_TOUCHPAD_PS2 */
20 PAD_GPO(GPIO_67, HIGH),
Raul E Rangelb3c41322020-05-20 14:07:41 -060021 /* DMIC_AD_EN */
22 PAD_GPO(GPIO_84, HIGH),
Furquan Shaikhda459c42020-06-18 01:34:48 -070023 /* MST_GPIO_2 (Fw Update HDMI hub) */
24 PAD_GPI(GPIO_86, PULL_NONE),
Furquan Shaikh79dba4a2020-08-04 17:16:33 -070025 /* EN_DEV_BEEP_L */
26 PAD_GPO(GPIO_89, HIGH),
Furquan Shaikhda459c42020-06-18 01:34:48 -070027 /* MST_GPIO_3 (Fw Update HDMI hub) */
28 PAD_GPI(GPIO_90, PULL_NONE),
Furquan Shaikhcc6c41f2020-08-04 20:16:55 -070029 /* USI_RESET */
30 PAD_GPO(GPIO_140, HIGH),
Raul E Rangelb3c41322020-05-20 14:07:41 -060031};
32
Furquan Shaikhda459c42020-06-18 01:34:48 -070033static const struct soc_amd_gpio morphius_bid2_gpio_set_stage_ram[] = {
34 /* DMIC_SEL */
35 PAD_GPO(GPIO_13, LOW), // Select Camera 1 Dmic
Raul E Rangelb3c41322020-05-20 14:07:41 -060036 /* USB_OC4_L - USB_A1 */
Furquan Shaikhf6b2e6f2020-07-17 15:30:47 -070037 PAD_NF(GPIO_14, USB_OC4_L, PULL_NONE),
Raul E Rangelb3c41322020-05-20 14:07:41 -060038 /* USB_OC2_L - USB A0 */
Furquan Shaikhf6b2e6f2020-07-17 15:30:47 -070039 PAD_NF(GPIO_18, USB_OC2_L, PULL_NONE),
Furquan Shaikh65e11172020-07-21 21:51:27 -070040 /* EN_PWR_WIFI */
41 PAD_GPO(GPIO_29, HIGH),
Furquan Shaikhda459c42020-06-18 01:34:48 -070042 /* EN_PWR_TOUCHPAD_PS2 */
43 PAD_GPO(GPIO_67, HIGH),
44 /* MST_GPIO_2 (Fw Update HDMI hub) */
45 PAD_GPI(GPIO_86, PULL_NONE),
Furquan Shaikh79dba4a2020-08-04 17:16:33 -070046 /* EN_DEV_BEEP_L */
47 PAD_GPO(GPIO_89, HIGH),
Furquan Shaikhda459c42020-06-18 01:34:48 -070048 /* MST_GPIO_3 (Fw Update HDMI hub) */
49 PAD_GPI(GPIO_90, PULL_NONE),
Furquan Shaikhcc6c41f2020-08-04 20:16:55 -070050 /* USI_RESET */
51 PAD_GPO(GPIO_140, HIGH),
52};
53
54static const struct soc_amd_gpio morphius_bid3_gpio_set_stage_ram[] = {
Furquan Shaikh79dba4a2020-08-04 17:16:33 -070055 /* EN_DEV_BEEP_L */
56 PAD_GPO(GPIO_89, HIGH),
Furquan Shaikh5474f8e2020-08-05 14:54:39 -070057 /* TP */
58 PAD_NC(GPIO_90),
Furquan Shaikhcc6c41f2020-08-04 20:16:55 -070059 /* USI_RESET */
60 PAD_GPO(GPIO_140, HIGH),
Raul E Rangelb3c41322020-05-20 14:07:41 -060061};
62
63const struct soc_amd_gpio *variant_override_gpio_table(size_t *size)
64{
65 uint32_t board_version;
66
67 /*
68 * If board version cannot be read, assume that this is an older revision of the board
69 * and so apply overrides. If board version is provided by the EC, then apply overrides
70 * if version < 2.
71 */
Eric Laif209b182020-10-20 02:44:53 +080072 if (google_chromeec_cbi_get_board_version(&board_version) != 0)
Raul E Rangelb3c41322020-05-20 14:07:41 -060073 board_version = 1;
74
75 if (board_version <= 1) {
Furquan Shaikhda459c42020-06-18 01:34:48 -070076 *size = ARRAY_SIZE(morphius_bid1_gpio_set_stage_ram);
77 return morphius_bid1_gpio_set_stage_ram;
Raul E Rangelb3c41322020-05-20 14:07:41 -060078 } else if (board_version <= 2) {
Furquan Shaikhda459c42020-06-18 01:34:48 -070079 *size = ARRAY_SIZE(morphius_bid2_gpio_set_stage_ram);
80 return morphius_bid2_gpio_set_stage_ram;
Furquan Shaikhcc6c41f2020-08-04 20:16:55 -070081 } else if (board_version <= 3) {
82 *size = ARRAY_SIZE(morphius_bid3_gpio_set_stage_ram);
83 return morphius_bid3_gpio_set_stage_ram;
Raul E Rangelb3c41322020-05-20 14:07:41 -060084 }
85
86 *size = 0;
87 return NULL;
88}