Arthur Heymans | 7f922b0 | 2018-08-22 02:14:04 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007 Atheros Corporation. All rights reserved. |
| 5 | * Copyright (C) 2012 Google Inc. |
| 6 | * Copyright (C) 2016 Damien Zammit <damien@zamaudio.com> |
| 7 | * Copyright (C) 2018 Arthur Heymans <arthur@aheymans.xyz> |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; version 2 of the License. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | */ |
| 18 | |
| 19 | /* |
| 20 | * This driver sets the macaddress of a Atheros AR8121/AR8113/AR8114 |
| 21 | */ |
| 22 | |
| 23 | #include <device/device.h> |
| 24 | #include <cbfs.h> |
| 25 | #include <string.h> |
| 26 | #include <console/console.h> |
| 27 | #include <device/pci.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame^] | 28 | #include <device/pci_ops.h> |
Arthur Heymans | 7f922b0 | 2018-08-22 02:14:04 +0200 | [diff] [blame] | 29 | |
| 30 | #define REG_SPI_FLASH_CTRL 0x200 |
| 31 | #define SPI_FLASH_CTRL_EN_VPD 0x2000 |
| 32 | |
| 33 | #define REG_PCIE_CAP_LIST 0x58 |
| 34 | |
| 35 | #define REG_MAC_STA_ADDR 0x1488 |
| 36 | |
| 37 | static u8 get_hex_digit(const u8 c) |
| 38 | { |
| 39 | u8 ret = 0; |
| 40 | |
| 41 | ret = c - '0'; |
| 42 | if (ret > 0x09) { |
| 43 | ret = c - 'A' + 0x0a; |
| 44 | if (ret > 0x0f) |
| 45 | ret = c - 'a' + 0x0a; |
| 46 | } |
| 47 | if (ret > 0x0f) { |
| 48 | printk(BIOS_ERR, "Error: Invalid hex digit found: " |
| 49 | "%c - 0x%02x\n", (char)c, c); |
| 50 | ret = 0; |
| 51 | } |
| 52 | return ret; |
| 53 | } |
| 54 | |
| 55 | #define MACLEN 17 |
| 56 | |
| 57 | static enum cb_err fetch_mac_string_cbfs(u8 *macstrbuf) |
| 58 | { |
| 59 | struct cbfsf fh; |
| 60 | uint32_t matchraw = CBFS_TYPE_RAW; |
| 61 | |
| 62 | if (!cbfs_boot_locate(&fh, "atl1e-macaddress", &matchraw)) { |
| 63 | /* check the cbfs for the mac address */ |
| 64 | if (rdev_readat(&fh.data, macstrbuf, 0, MACLEN) != MACLEN) { |
| 65 | printk(BIOS_ERR, "atl1e: Error reading MAC from CBFS\n"); |
| 66 | return CB_ERR; |
| 67 | } |
| 68 | return CB_SUCCESS; |
| 69 | } |
| 70 | return CB_ERR; |
| 71 | } |
| 72 | |
| 73 | static void get_mac_address(u8 *macaddr, const u8 *strbuf) |
| 74 | { |
| 75 | size_t offset = 0; |
| 76 | int i; |
| 77 | |
| 78 | if ((strbuf[2] != ':') || (strbuf[5] != ':') || |
| 79 | (strbuf[8] != ':') || (strbuf[11] != ':') || |
| 80 | (strbuf[14] != ':')) { |
| 81 | printk(BIOS_ERR, "atl1e: ignore invalid MAC address in cbfs\n"); |
| 82 | return; |
| 83 | } |
| 84 | |
| 85 | for (i = 0; i < 6; i++) { |
| 86 | macaddr[i] = 0; |
| 87 | macaddr[i] |= get_hex_digit(strbuf[offset]) << 4; |
| 88 | macaddr[i] |= get_hex_digit(strbuf[offset + 1]); |
| 89 | offset += 3; |
| 90 | } |
| 91 | } |
| 92 | |
| 93 | static void program_mac_address(u32 mem_base) |
| 94 | { |
| 95 | u8 macstrbuf[MACLEN] = { 0 }; |
| 96 | /* Default MAC Address of 90:e6:ba:24:f9:d2 */ |
| 97 | u8 mac[6] = { 0x90, 0xe6, 0xba, 0x24, 0xf9, 0xd2 }; |
| 98 | u32 value; |
| 99 | |
| 100 | if (fetch_mac_string_cbfs(macstrbuf) != CB_SUCCESS) { |
| 101 | printk(BIOS_ERR, "atl1e: Error reading MAC from CBFS," |
| 102 | " using default 90:e6:ba:24:f9:d2\n"); |
| 103 | } else { |
| 104 | get_mac_address(mac, macstrbuf); |
| 105 | } |
| 106 | |
| 107 | printk(BIOS_DEBUG, "atl1e: Programming MAC Address..."); |
| 108 | |
| 109 | value = (mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | (mac[5] << 0); |
| 110 | write32((void *)mem_base + REG_MAC_STA_ADDR, value); |
| 111 | value = (mac[0] << 8) | (mac[1] << 0); |
| 112 | write32((void *)mem_base + REG_MAC_STA_ADDR + 4, value); |
| 113 | |
| 114 | printk(BIOS_DEBUG, "done\n"); |
| 115 | } |
| 116 | |
| 117 | static int atl1e_eeprom_exist(u32 mem_base) |
| 118 | { |
| 119 | u32 value = read32((void *)mem_base + REG_SPI_FLASH_CTRL); |
| 120 | if (value & SPI_FLASH_CTRL_EN_VPD) { |
| 121 | value &= ~SPI_FLASH_CTRL_EN_VPD; |
| 122 | write32((void *)mem_base + REG_SPI_FLASH_CTRL, value); |
| 123 | } |
| 124 | value = read32((void *)mem_base + REG_PCIE_CAP_LIST); |
| 125 | return ((value & 0xff00) == 0x6c00) ? 1 : 0; |
| 126 | } |
| 127 | |
| 128 | static void atl1e_init(struct device *dev) |
| 129 | { |
| 130 | /* Get the resource of the NIC mmio */ |
| 131 | struct resource *nic_res = find_resource(dev, PCI_BASE_ADDRESS_0); |
| 132 | |
| 133 | if (nic_res == NULL) { |
| 134 | printk(BIOS_ERR, "atl1e: resource not found\n"); |
| 135 | return; |
| 136 | } |
| 137 | |
| 138 | u32 mem_base = nic_res->base; |
| 139 | |
| 140 | if (!mem_base) { |
| 141 | printk(BIOS_ERR, "atl1e: resource not assigned\n"); |
| 142 | return; |
| 143 | } |
| 144 | |
| 145 | if (atl1e_eeprom_exist(mem_base)) { |
| 146 | printk(BIOS_INFO, "atl1e NIC has SPI eeprom, not setting MAC\n"); |
| 147 | return; |
| 148 | } |
| 149 | |
| 150 | /* Check if the base is invalid */ |
| 151 | if (!mem_base) { |
| 152 | printk(BIOS_ERR, "atl1e: Error cant find MEM resource\n"); |
| 153 | return; |
| 154 | } |
| 155 | /* Enable but do not set bus master */ |
| 156 | pci_write_config16(dev, PCI_COMMAND, |
| 157 | PCI_COMMAND_MEMORY | PCI_COMMAND_IO); |
| 158 | |
| 159 | /* Program MAC address based on CBFS "macaddress" containing |
| 160 | * a string AA:BB:CC:DD:EE:FF */ |
| 161 | program_mac_address(mem_base); |
| 162 | } |
| 163 | |
| 164 | static struct device_operations atl1e_ops = { |
| 165 | .read_resources = pci_dev_read_resources, |
| 166 | .set_resources = pci_dev_set_resources, |
| 167 | .enable_resources = pci_dev_enable_resources, |
| 168 | .init = atl1e_init, |
| 169 | .scan_bus = 0, |
| 170 | }; |
| 171 | |
| 172 | static const struct pci_driver atl1e_driver __pci_driver = { |
| 173 | .ops = &atl1e_ops, |
| 174 | .vendor = 0x1969, |
| 175 | .device = 0x1026, |
| 176 | }; |
| 177 | |
| 178 | struct chip_operations drivers_net_ops = { |
| 179 | CHIP_NAME("Atheros AR8121/AR8113/AR8114") |
| 180 | }; |