blob: 2ec85ac31f5d8051a764296dc2ad3a38e7858c1b [file] [log] [blame]
Patrick Rudolphf1a4ae02019-09-30 11:02:04 +02001/*
2 * Copied from Linux drivers/gpu/drm/ast/ast_mode.c
3 *
4 * Copyright 2012 Red Hat Inc.
5 * Parts based on xf86-video-ast
6 * Copyright (c) 2005 ASPEED Technology Inc.
7 * Copyright Dave Airlie <airlied@redhat.com>
8 * Copyright 2019 9Elements Agency GmbH <patrick.rudolph@9elements.com>
9 *
10 * Permission is hereby granted, free of charge, to any person obtaining a
11 * copy of this software and associated documentation files (the
12 * "Software"), to deal in the Software without restriction, including
13 * without limitation the rights to use, copy, modify, merge, publish,
14 * distribute, sub license, and/or sell copies of the Software, and to
15 * permit persons to whom the Software is furnished to do so, subject to
16 * the following conditions:
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 * The above copyright notice and this permission notice (including the
27 * next paragraph) shall be included in all copies or substantial portions
28 * of the Software.
29 *
30 */
31
32#include <edid.h>
33
34#include "ast_drv.h"
35
36/*
37 * Set framebuffer MMIO address, which must fall into BAR0 MMIO window.
38 *
39 * Complete reimplementation as the original expects multiple kernel internal
40 * subsystems to be present.
41 */
42int ast_crtc_do_set_base(struct drm_crtc *crtc)
43{
44 struct ast_private *ast = crtc->dev->dev_private;
45 struct drm_framebuffer *fb = crtc->primary->fb;
46
47 /* PCI BAR 0 */
48 struct resource *res = find_resource(crtc->dev->pdev, 0x10);
49 if (!res) {
50 printk(BIOS_ERR, "BAR0 resource not found.\n");
51 return -EIO;
52 }
53
54 if (res->size < fb->pitches[0] * crtc->mode.vdisplay) {
55 dev_err(dev->pdev, "Framebuffer doesn't fit into BAR0 MMIO window\n");
56 return -ENOMEM;
57 }
58
59 fb->mmio_addr = (u32)res2mmio(res, 4095, 4095);
60
61 ast_set_offset_reg(crtc);
62 ast_set_start_address_crt1(ast, fb->mmio_addr);
63
64 return 0;
65}
66
67static void ast_edid_to_drmmode(struct edid *edid, struct drm_display_mode *mode)
68{
69 memset(mode, 0, sizeof(*mode));
70
71 mode->hdisplay = edid->mode.ha;
72 mode->vdisplay = edid->mode.va;
73 mode->crtc_hdisplay = edid->mode.ha;
74 mode->crtc_vdisplay = edid->mode.va;
75
76 /* EDID clock is in 10kHz, but drm clock is in KHz */
77 mode->clock = edid->mode.pixel_clock * 10;
78 mode->vrefresh = edid->mode.refresh;
79
80 mode->crtc_hblank_start = edid->mode.ha;
81 mode->crtc_hblank_end = edid->mode.ha + edid->mode.hbl;
82 mode->crtc_hsync_start = edid->mode.ha + edid->mode.hso;
83 mode->crtc_hsync_end = edid->mode.ha + edid->mode.hso + edid->mode.hspw;
84 mode->crtc_htotal = mode->crtc_hblank_end;
85
86 mode->crtc_vblank_start = edid->mode.va;
87 mode->crtc_vblank_end = edid->mode.va + edid->mode.vbl;
88 mode->crtc_vsync_start = edid->mode.va + edid->mode.vso;
89 mode->crtc_vsync_end = edid->mode.va + edid->mode.vso + edid->mode.vspw;
90 mode->crtc_vtotal = mode->crtc_vblank_end;
91
92 mode->flags = 0;
93 if (edid->mode.phsync == '+')
94 mode->flags |= DRM_MODE_FLAG_PHSYNC;
95 else
96 mode->flags |= DRM_MODE_FLAG_NHSYNC;
97
98 if (edid->mode.pvsync == '+')
99 mode->flags |= DRM_MODE_FLAG_PVSYNC;
100 else
101 mode->flags |= DRM_MODE_FLAG_NVSYNC;
102}
103
104static int ast_select_mode(struct drm_connector *connector,
105 struct edid *edid)
106{
107 struct ast_private *ast = connector->dev->dev_private;
108 bool widescreen;
109 u8 raw[128];
110 bool flags = false;
111
112 if (ast->tx_chip_type == AST_TX_DP501) {
113 ast->dp501_maxclk = 0xff;
114 flags = ast_dp501_read_edid(connector->dev, (u8 *)raw);
115 if (flags)
116 ast->dp501_maxclk = ast_get_dp501_max_clk(connector->dev);
117 else
118 dev_err(dev->pdev, "I2C transmission error\n");
119 }
120
121 if (!flags)
122 ast_software_i2c_read(ast, raw);
123
124 if (decode_edid(raw, sizeof(raw), edid) != EDID_CONFORMANT) {
125 dev_err(dev->pdev, "Failed to decode EDID\n");
126 printk(BIOS_DEBUG, "Assuming VGA for KVM\n");
127
128 memset(edid, 0, sizeof(*edid));
129
130 edid->mode.pixel_clock = 6411;
131 edid->mode.refresh = 60;
132 edid->mode.ha = 1024;
133 edid->mode.hspw = 4;
134 edid->mode.hso = 56;
135 edid->mode.hbl = 264;
136 edid->mode.phsync = '-';
137
138 edid->mode.va = 768;
139 edid->mode.vspw = 3;
140 edid->mode.vso = 1;
141 edid->mode.vbl = 26;
142 edid->mode.pvsync = '+';
143 }
144
145 printk(BIOS_DEBUG, "AST: Display has %dpx x %dpx\n", edid->mode.ha, edid->mode.va);
146
147 widescreen = !!(((edid->mode.ha * 4) % (edid->mode.va * 3)));
148
149 while (ast_mode_valid(connector, edid->mode.ha, edid->mode.va) != MODE_OK) {
150 /* Select a compatible smaller mode */
151 if (edid->mode.ha > 1920 && widescreen) {
152 edid->mode.ha = 1920;
153 edid->mode.va = 1080;
154 } else if (edid->mode.ha >= 1920 && widescreen) {
155 edid->mode.ha = 1680;
156 edid->mode.va = 1050;
157 } else if (edid->mode.ha >= 1680 && widescreen) {
158 edid->mode.ha = 1600;
159 edid->mode.va = 900;
160 } else if (edid->mode.ha >= 1680 && !widescreen) {
161 edid->mode.ha = 1600;
162 edid->mode.va = 1200;
163 } else if (edid->mode.ha >= 1600 && widescreen) {
164 edid->mode.ha = 1440;
165 edid->mode.va = 900;
166 } else if (edid->mode.ha >= 1440 && widescreen) {
167 edid->mode.ha = 1360;
168 edid->mode.va = 768;
169 } else if (edid->mode.ha >= 1360 && widescreen) {
170 edid->mode.ha = 1280;
171 edid->mode.va = 800;
172 } else if (edid->mode.ha >= 1360 && !widescreen) {
173 edid->mode.ha = 1280;
174 edid->mode.va = 1024;
175 } else if (edid->mode.ha >= 1280) {
176 edid->mode.ha = 1024;
177 edid->mode.va = 768;
178 } else if (edid->mode.ha >= 1024) {
179 edid->mode.ha = 800;
180 edid->mode.va = 600;
181 } else if (edid->mode.ha >= 800) {
182 edid->mode.ha = 640;
183 edid->mode.va = 480;
184 } else {
185 dev_err(dev->pdev, "No compatible mode found.\n");
186
187 return -EIO;
188 }
189 };
190
191 return 0;
192}
193
194int ast_driver_framebuffer_init(struct drm_device *dev, int flags)
195{
196 struct drm_display_mode adjusted_mode;
197 struct drm_crtc crtc;
198 struct drm_format format;
199 struct drm_primary primary;
200 struct drm_framebuffer fb;
201 struct drm_connector connector;
202 struct edid edid;
203 int ret;
204
205 /* Init wrapper structs */
206 connector.dev = dev;
207
208 format.cpp[0] = 4; /* 32 BPP */
209 fb.format = &format;
210
211 primary.fb = &fb;
212
213 crtc.dev = dev;
214 crtc.primary = &primary;
215
216 /* Read EDID and find mode */
217 ret = ast_select_mode(&connector, &edid);
218 if (ret) {
219 dev_err(dev->pdev, "Failed to select mode.\n");
220 return ret;
221 }
222
223 /* Updated edid for set_vbe_mode_info_valid */
224 edid.x_resolution = edid.mode.ha;
225 edid.y_resolution = edid.mode.va;
226 edid.framebuffer_bits_per_pixel = format.cpp[0] * 8;
227 edid.bytes_per_line = ALIGN_UP(edid.x_resolution * format.cpp[0], 8);
228
229 /* Updated framebuffer info for ast_crtc_mode_set */
230 fb.pitches[0] = edid.bytes_per_line;
231
232 printk(BIOS_DEBUG, "Using framebuffer %dpx x %dpx pitch %d @ %d BPP\n",
233 edid.x_resolution, edid.y_resolution, edid.bytes_per_line,
234 edid.framebuffer_bits_per_pixel);
235
236 /* Convert EDID to AST DRM mode */
237 ast_edid_to_drmmode(&edid, &crtc.mode);
238
239 memcpy(&adjusted_mode, &crtc.mode, sizeof(crtc.mode));
240
241 ret = ast_crtc_mode_set(&crtc, &crtc.mode, &adjusted_mode);
242 if (ret) {
243 dev_err(dev->pdev, "Failed to set mode.\n");
244 return ret;
245 }
246
247 ast_hide_cursor(&crtc);
248
249 /* Advertise new mode */
250 set_vbe_mode_info_valid(&edid, fb.mmio_addr);
251
252 /* Clear display */
253 memset((void *)fb.mmio_addr, 0, edid.bytes_per_line * edid.y_resolution);
254
255 return 0;
256}