blob: 36bbf0aa605ccf9638f893e987d717324a189f95 [file] [log] [blame]
Angel Ponsae593872020-04-04 18:50:57 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Martin Roth5c354b92019-04-22 14:55:16 -06002
Felix Helddd2f3fa2021-02-08 22:23:54 +01003#include <amdblocks/cpu.h>
Felix Helda5cdf752021-03-10 15:47:00 +01004#include <amdblocks/reset.h>
Felix Heldbc134812021-02-10 02:26:10 +01005#include <amdblocks/smm.h>
Martin Roth5c354b92019-04-22 14:55:16 -06006#include <cpu/cpu.h>
7#include <cpu/x86/mp.h>
8#include <cpu/x86/mtrr.h>
9#include <cpu/x86/msr.h>
Kyösti Mälkkib2a5f0b2019-08-04 19:54:32 +030010#include <cpu/x86/smm.h>
Martin Roth5c354b92019-04-22 14:55:16 -060011#include <cpu/x86/lapic.h>
12#include <device/device.h>
13#include <device/pci_ops.h>
14#include <soc/pci_devs.h>
15#include <soc/cpu.h>
Martin Roth5c354b92019-04-22 14:55:16 -060016#include <soc/smi.h>
17#include <soc/iomap.h>
18#include <console/console.h>
Zheng Bao6ba591b2020-06-09 09:47:06 +080019#include <cpu/amd/microcode.h>
Martin Roth5c354b92019-04-22 14:55:16 -060020
21/*
22 * MP and SMM loading initialization.
23 */
Martin Roth5c354b92019-04-22 14:55:16 -060024
25/*
26 * Do essential initialization tasks before APs can be fired up -
27 *
28 * 1. Prevent race condition in MTRR solution. Enable MTRRs on the BSP. This
29 * creates the MTRR solution that the APs will use. Otherwise APs will try to
30 * apply the incomplete solution as the BSP is calculating it.
31 */
32static void pre_mp_init(void)
33{
Aaron Durbina2c045b2020-05-28 10:19:18 -060034 x86_setup_mtrrs_with_detect_no_above_4gb();
Martin Roth5c354b92019-04-22 14:55:16 -060035 x86_mtrr_check();
36}
37
Kyösti Mälkki2fec39492020-07-01 15:59:20 +030038static void post_mp_init(void)
39{
40 global_smi_enable();
41 apm_control(APM_CNT_SMMINFO);
42}
43
Martin Roth5c354b92019-04-22 14:55:16 -060044static const struct mp_ops mp_ops = {
45 .pre_mp_init = pre_mp_init,
46 .get_cpu_count = get_cpu_count,
47 .get_smm_info = get_smm_info,
Felix Heldbc134812021-02-10 02:26:10 +010048 .relocation_handler = smm_relocation_handler,
Kyösti Mälkki2fec39492020-07-01 15:59:20 +030049 .post_mp_init = post_mp_init,
Martin Roth5c354b92019-04-22 14:55:16 -060050};
51
Kyösti Mälkki79e12ab2020-05-31 09:21:07 +030052void mp_init_cpus(struct bus *cpu_bus)
Martin Roth5c354b92019-04-22 14:55:16 -060053{
54 /* Clear for take-off */
Kyösti Mälkki79e12ab2020-05-31 09:21:07 +030055 if (mp_init_with_smm(cpu_bus, &mp_ops) < 0)
Martin Roth5c354b92019-04-22 14:55:16 -060056 printk(BIOS_ERR, "MP initialization failure.\n");
57
Raul E Rangel93375f22020-06-05 15:48:21 -060058 /* pre_mp_init made the flash not cacheable. Reset to WP for performance. */
Martin Roth5c354b92019-04-22 14:55:16 -060059 mtrr_use_temp_range(FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT);
60
61 set_warm_reset_flag();
62}
63
Marshall Dawson34c30562019-07-16 15:18:00 -060064static void model_17_init(struct device *dev)
Martin Roth5c354b92019-04-22 14:55:16 -060065{
66 check_mca();
67 setup_lapic();
Chris Wange2497d02020-08-03 22:36:13 +080068 set_cstate_io_addr();
Zheng Bao6ba591b2020-06-09 09:47:06 +080069
70 amd_update_microcode_from_cbfs();
Martin Roth5c354b92019-04-22 14:55:16 -060071}
72
73static struct device_operations cpu_dev_ops = {
Marshall Dawson34c30562019-07-16 15:18:00 -060074 .init = model_17_init,
Martin Roth5c354b92019-04-22 14:55:16 -060075};
76
77static struct cpu_device_id cpu_table[] = {
Felix Held53c173e2020-11-05 17:24:18 +010078 { X86_VENDOR_AMD, RAVEN1_B0_CPUID},
Felix Heldab114c92020-05-22 02:40:40 +020079 { X86_VENDOR_AMD, PICASSO_B0_CPUID },
80 { X86_VENDOR_AMD, PICASSO_B1_CPUID },
81 { X86_VENDOR_AMD, RAVEN2_A0_CPUID },
82 { X86_VENDOR_AMD, RAVEN2_A1_CPUID },
Martin Roth5c354b92019-04-22 14:55:16 -060083 { 0, 0 },
84};
85
Marshall Dawson34c30562019-07-16 15:18:00 -060086static const struct cpu_driver model_17 __cpu_driver = {
Martin Roth5c354b92019-04-22 14:55:16 -060087 .ops = &cpu_dev_ops,
88 .id_table = cpu_table,
89};