| Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008-2009 coresystems GmbH |
| 5 | * 2012 secunet Security Networks AG |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; version 2 of |
| 10 | * the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 20 | */ |
| 21 | |
| 22 | #include <arch/io.h> |
| 23 | #include <arch/romcc_io.h> |
| 24 | #include <console/console.h> |
| 25 | #include <device/pci_ids.h> |
| 26 | #include <device/pci_def.h> |
| 27 | #include "i82801ix.h" |
| 28 | #include "smbus.h" |
| 29 | |
| 30 | void enable_smbus(void) |
| 31 | { |
| 32 | device_t dev; |
| 33 | |
| 34 | /* Set the SMBus device statically. */ |
| 35 | dev = PCI_DEV(0x0, 0x1f, 0x3); |
| 36 | |
| 37 | /* Check to make sure we've got the right device. */ |
| 38 | if (pci_read_config16(dev, 0x2) != 0x2930) { |
| 39 | die("SMBus controller not found!"); |
| 40 | } |
| 41 | |
| 42 | /* Set SMBus I/O base. */ |
| 43 | pci_write_config32(dev, SMB_BASE, |
| 44 | SMBUS_IO_BASE | PCI_BASE_ADDRESS_SPACE_IO); |
| 45 | |
| 46 | /* Set SMBus enable. */ |
| 47 | pci_write_config8(dev, HOSTC, HST_EN); |
| 48 | |
| 49 | /* Set SMBus I/O space enable. */ |
| 50 | pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO); |
| 51 | |
| 52 | /* Disable interrupt generation. */ |
| 53 | outb(0, SMBUS_IO_BASE + SMBHSTCTL); |
| 54 | |
| 55 | /* Clear any lingering errors, so transactions can run. */ |
| 56 | outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT); |
| 57 | print_debug("SMBus controller enabled.\n"); |
| 58 | } |
| 59 | |
| 60 | int smbus_read_byte(unsigned device, unsigned address) |
| 61 | { |
| 62 | return do_smbus_read_byte(SMBUS_IO_BASE, device, address); |
| 63 | } |
| 64 | |