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efdesign987c0c64e2011-06-20 19:56:06 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20
21#ifndef _CIMX_SB_EARLY_H_
22#define _CIMX_SB_EARLY_H_
23
24#define PM_INDEX 0xcd6
25#define PM_DATA 0xcd7
26
27#define SB900_ACPI_IO_BASE 0x800
28
29#define ACPI_PM_EVT_BLK (SB900_ACPI_IO_BASE + 0x00) /* 4 bytes */
30#define ACPI_PM1_CNT_BLK (SB900_ACPI_IO_BASE + 0x04) /* 2 bytes */
31#define ACPI_PMA_CNT_BLK (SB900_ACPI_IO_BASE + 0x0F) /* 1 byte */
32#define ACPI_PM_TMR_BLK (SB900_ACPI_IO_BASE + 0x08) /* 4 bytes */
33#define ACPI_GPE0_BLK (SB900_ACPI_IO_BASE + 0x20) /* 8 bytes */
34#define ACPI_CPU_CONTROL (SB900_ACPI_IO_BASE + 0x10) /* 6 bytes */
35
36#define REV_SB900_A11 0x11
37#define REV_SB900_A12 0x12
38
39/**
40 * @brief Get SouthBridge device number, called by finalize_node_setup()
41 * @param[in] bus target bus number
42 * @return southbridge device number
43 */
44u32 get_sbdn(u32 bus);
45
46/**
47 * South Bridge CIMx romstage entry, sbPowerOnInit entry point wrapper.
48 */
49void sb_poweron_init(void);
50void sb_before_pci_init(void);
51
52void sb_After_Pci_Init (void);
53void sb_Mid_Post_Init (void);
54void sb_Late_Post (void);
55
56#endif