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review.coreboot.org / coreboot / f00e446e746da54b7cf967deae73cf090f3835eb / . / src / include / cpu / amd / sc520.h
blob: 4e748be5308e9b1cbce741fdd9a339fe6dae75dd [file] [log] [blame]
Ronald G. Minnich64473582005-09-12 13:42:56 +0000[diff] [blame]1/* handy dandy stuff for the sc520 MMCR */
2/* default location of the MMCR */
3#define MMCR 0xfffef000
4
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]5/* the PAR register struct definition, the location in memory,
6 * and a handy pointer for you to use
Ronald G. Minnich64473582005-09-12 13:42:56 +0000[diff] [blame]7 */
8
9struct parreg {
10 unsigned long reg[16];
11};
12
Lee Leahyf00e4462017-03-07 13:17:49 -0800[diff] [blame^]13#define PARREG ((struct parreg *)0xfffef088)
Ronald G. Minnich64473582005-09-12 13:42:56 +0000[diff] [blame]14//static volatile struct parreg *par = PARREG;
15
16
Lee Leahyf00e4462017-03-07 13:17:49 -0800[diff] [blame^]17#define MMCRPIC ((struct mmcrpic *) 0xfffefd00)
Ronald G. Minnich64473582005-09-12 13:42:56 +0000[diff] [blame]18//static volatile struct mmcrpic *pic = MMCRPIC;
19
20#define M_GINT_MODE 1
21#define M_S1_MODE 2
22#define M_S2_MODE 4
23
24
25/* here is the real mmcr struct */
26
27struct memregs {
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]28 /* make these shorts, we are lsb and the hardware seems to like it
Ronald G. Minnich64473582005-09-12 13:42:56 +0000[diff] [blame]29 * better
30 */
31 unsigned short drcctl;
32 unsigned short drctmctl;
33 unsigned short drccfg;
34 unsigned char pad1[2];
35 unsigned char drcbendadr[4];
36 unsigned char pad2[4];
37 unsigned char eccctl;
38 unsigned char eccsta;
39 unsigned char eccckbpos;
40 unsigned char ecccktest;
41 unsigned long eccsbadd;
42 unsigned long eccmbadd;
43 unsigned char pad3[18];
44};
45struct dbctl {
46 unsigned char dbctl;
47 unsigned char pad4[15];
48};
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]49
Ronald G. Minnich64473582005-09-12 13:42:56 +0000[diff] [blame]50struct romregs {
51 unsigned char bootcs;
52 unsigned char pad5[3];
53 unsigned char romcs1;
54 unsigned char pad6[1];
55 unsigned char romcs2;
56 unsigned char pad7[6];
57};
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]58
Ronald G. Minnich64473582005-09-12 13:42:56 +0000[diff] [blame]59
60struct hostbridge {
61 unsigned short ctl;
62 unsigned short tgtirqctl;
63 unsigned short tgtirqsta;
64 unsigned short mstirqctl;
65 unsigned short mstirqsta;
66 unsigned char pad8[2];
67 unsigned long mstintadd;
68};
69
70struct sysarb {
71 unsigned char ctl;
72 unsigned char sta;
73 unsigned char menb;
74 unsigned long prictl;
75 unsigned char pad9[8];
76};
77
78struct sysmap {
79 unsigned char adddecctl;
80 unsigned char pada[1];
81 unsigned short wpvsta;
82 unsigned char padb[4];
83 unsigned long par[16];
84 unsigned char padc[0xb38];
85};
86
87struct gpctl {
88 unsigned char gpecho;
89 unsigned char gpcsdw;
90 unsigned char gpcsqual;
91 unsigned char padd[5];
92 unsigned char gpcsrt;
93 unsigned char gpcspw;
94 unsigned char gpcsoff;
95 unsigned char gprdw;
96 unsigned char gprdoff;
97 unsigned char gpwrw;
98 unsigned char gpwroff;
99 unsigned char gpalew;
100 unsigned char gpaleoff;
101 unsigned char pade[15];
102};
103
104struct pio {
105 unsigned short pfs15_0;
106 unsigned short pfs31_16;
107 unsigned char cspfs;
108 unsigned char padf[1];
109 unsigned char clksel;
110 unsigned char padg[1];
111 unsigned short dsctl;
112 unsigned short dir15_0;
113 unsigned short dir31_16;
114 unsigned short padh;
115 unsigned short data15_0;
116 unsigned short data31_16;
117 unsigned short set15_0;
118 unsigned short set31_16;
119 unsigned short clr15_0;
120 unsigned short clr31_16;
121 unsigned char padi[0x24];
122};
123
124struct swtmr {
125 unsigned short swtmrmilli;
126 unsigned short swtmrmicro;
127 unsigned char swtmrcfg;
128 unsigned char padj[0xb];
129};
130
131struct gptmr {
132 unsigned short ctl;
133 unsigned short cnt;
134 unsigned short maxcmpa, maxcmpb;
135};
136
137struct gptimers {
138 unsigned char status;
139 unsigned char pad;
140 struct gptmr timer[2];
141 /* yes, they REALLY DID make timer 2 different. */
142 /* yikes */
143 unsigned short ctl2;
144 unsigned short cnt2;
145 unsigned char paddumb[8];
146 unsigned short maxcmpa2;
147
148 unsigned char pada[0x20];
149};
150
151struct watchdog {
152 unsigned short ctl;
153 unsigned short cntll;
Lee Leahy708fc272017-03-07 12:18:53 -0800[diff] [blame]154 unsigned short cntlh;
Ronald G. Minnich64473582005-09-12 13:42:56 +0000[diff] [blame]155 unsigned char pad[10];
156};
157
158struct uart {
159 unsigned char ctl, sta, fcrshad, pad;
160};
161
162struct uarts {
163 struct uart uart[2];
164 unsigned char pad[8];
165};
166
167struct ssi {
168 unsigned char ctl, xmit, cmd, sta, rcv;
169 unsigned char pad[0x2b];
170};
171
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]172
Ronald G. Minnich64473582005-09-12 13:42:56 +0000[diff] [blame]173/* interrupt control registers */
174/* defined this way for portability. Shame we can't just use plan 9 c. */
175struct pic {
176 unsigned char pcicr;
177 unsigned char pad1;
178 unsigned char mpicmode;
179 unsigned char sl1picmode;
180 unsigned char sl2picmode;
181 unsigned char pad2[3];
182 unsigned char swint16_1;
183 unsigned char pad3;
184 unsigned char swint22_17;
185 unsigned char pad4[5];
186 unsigned short intpinpol;
187 unsigned char pad5[2];
188 unsigned char pichostmap;
189 unsigned char pad6[3];
190 unsigned char eccmap;
191 unsigned char pad7[1];
192 unsigned char gptmr0map;
193 unsigned char gptmr1map;
194 unsigned char gptmr2map;
195 unsigned char pad8[3];
196 unsigned char pit0map;
197 unsigned char pit1map;
198 unsigned char pit2map;
199 unsigned char pad9[5];
200 unsigned char uart1map;
201 unsigned char uart2map;
202 unsigned char pad99[6];
203 unsigned char pciintamap;
204 unsigned char pciintbmap;
205 unsigned char pciintcmap;
206 unsigned char pciintdmap;
207 unsigned char pad10[12];
208 unsigned char dmabcintmap;
209 unsigned char ssimap;
210 unsigned char wdtmap;
211 unsigned char rtcmap;
212 unsigned char wpvmap;
213 unsigned char icemap;
214 unsigned char ferrmap;
215 unsigned char pad11[9];
216 unsigned char gp0imap;
217 unsigned char gp1imap;
218 unsigned char gp2imap;
219 unsigned char gp3imap;
220 unsigned char gp4imap;
221 unsigned char gp5imap;
222 unsigned char gp6imap;
223 unsigned char gp7imap;
224 unsigned char gp8imap;
225 unsigned char gp9imap;
226 unsigned char gp10imap;
227 unsigned char padend[0x14];
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]228};
Ronald G. Minnich64473582005-09-12 13:42:56 +0000[diff] [blame]229
230struct reset {
231 unsigned char sysinfo;
232 unsigned char pad1;
233 unsigned char rescfg;
234 unsigned char pad2;
235 unsigned char ressta;
236 unsigned char pad3[0xb];
237};
238
239struct dmacontrol {
240 unsigned char ctl;
241 unsigned char mmio;
242 unsigned short extchanmapa;
243 unsigned short extchanmapb;
244 unsigned char extpg0;
245 unsigned char extpg1;
246 unsigned char extpg2;
247 unsigned char extpg3;
248 unsigned char extpg5;
249 unsigned char extpg6;
250 unsigned char extpg7;
251 unsigned char pad[3];
252 unsigned char exttc3;
253 unsigned char exttc5;
254 unsigned char exttc6;
255 unsigned char exttc7;
256 unsigned char pad1[4];
257 unsigned char bcctl;
258 unsigned char bcsta;
259 unsigned char bsintenb;
260 unsigned char bcval;
261 unsigned char pad2[4];
262 unsigned short nxtaddl3;
263 unsigned short nxtaddh3;
264 unsigned short nxtaddl5;
265 unsigned short nxtaddh5;
266 unsigned short nxtaddl6;
267 unsigned short nxtaddh6;
268 unsigned short nxtaddl7;
269 unsigned short nxtaddh7;
270 unsigned short nxtttcl3;
271 unsigned char nxtttch3;
272 unsigned char pad3;
273 unsigned short nxtttcl5;
274 unsigned char nxtttch5;
275 unsigned char pad5;
276 unsigned short nxtttcl6;
277 unsigned char nxtttch6;
278 unsigned char pad6;
279 unsigned short nxtttcl7;
280 unsigned char nxtttch7;
281 unsigned char pad7;
282};
283
284
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]285
Ronald G. Minnich64473582005-09-12 13:42:56 +0000[diff] [blame]286
287struct mmcr {
288 unsigned short revid;
289 unsigned char cpucontrol;
290 unsigned char pad1[11];
291 struct memregs memregs;
292 struct dbctl dbctl;
293 struct romregs romregs;
294 struct hostbridge hostbridge;
295 struct sysarb sysarb;
296 struct sysmap sysmap;
297 struct gpctl gpctl;
298 struct pio pio;
299 struct swtmr swtmr;
300 struct gptimers gptimers;
301 struct watchdog watchdog;
302 struct uarts uarts;
303 struct ssi ssi;
304 struct pic pic;
305 struct reset reset;
306 struct dmacontrol dmacontrol;
307 unsigned char padend[0x23d];
308};
309
310
Lee Leahyf00e4462017-03-07 13:17:49 -0800[diff] [blame^]311#define MMCRDEFAULT ((struct mmcr *) 0xfffef000)