blob: 5023578fbf11b7cdd82438ab3590b85e682a0751 [file] [log] [blame]
Michael Xie7586cef2008-09-22 13:11:39 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include <console/console.h>
21#include <device/device.h>
22#include <device/pci.h>
23#include <device/pci_ids.h>
24#include <device/pci_ops.h>
Stefan Reinauerda323732010-05-25 16:17:45 +000025#include <usbdebug.h>
Michael Xie7586cef2008-09-22 13:11:39 +000026#include <arch/io.h>
27#include "sb600.h"
28
29static struct pci_operations lops_pci = {
30 .set_subsystem = pci_dev_set_subsystem,
31};
32
33static void usb_init(struct device *dev)
34{
35 u8 byte;
36 u16 word;
37 u32 dword;
38
39 /* Enable OHCI0-4 and EHCI Controllers */
40 device_t sm_dev;
41 sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
42 byte = pci_read_config8(sm_dev, 0x68);
43 byte |= 0x3F;
44 pci_write_config8(sm_dev, 0x68, byte);
45
46 /* RPR 5.2 Enables the USB PME Event,Enable USB resume support */
47 byte = pm_ioread(0x61);
48 byte |= 1 << 6;
49 pm_iowrite(0x61, byte);
50 byte = pm_ioread(0x65);
51 byte |= 1 << 2;
52 pm_iowrite(0x65, byte);
53
54 /* RPR 5.3 Support USB device wakeup from the S4/S5 state */
55 byte = pm_ioread(0x65);
56 byte &= ~(1 << 0);
57 pm_iowrite(0x65, byte);
58
59 /* RPR 5.6 Enable the USB controller to get reset by any software that generate a PCIRst# condition */
60 byte = pm_ioread(0x65);
61 byte |= (1 << 4);
62 pm_iowrite(0x65, byte);
63
64 /* RPR 5.11 Disable OHCI MSI Capability */
65 word = pci_read_config16(dev, 0x40);
66 word |= (0x1F << 8);
67 pci_write_config16(dev, 0x40, word);
68
69 /* RPR 5.8 Disable the OHCI Dynamic Power Saving feature */
70 dword = pci_read_config32(dev, 0x50);
71 dword &= ~(1 << 16);
72 pci_write_config32(dev, 0x50, dword);
73
74 /* RPR 5.12 Enable prevention of OHCI accessing the invalid system memory address range */
75 word = pci_read_config16(dev, 0x50);
76 word |= 1 << 15;
77 pci_write_config16(dev, 0x50, word);
78
79 /* RPR 5.15 Disable SMI handshake in between USB and ACPI for USB legacy support. */
80 /* The BIOS should always set this bit to prevent the malfunction on USB legacy keyboard/mouse support */
81 word = pci_read_config16(dev, 0x50);
82 word |= 1 << 12;
83 pci_write_config16(dev, 0x50, word);
84}
85
86static void usb_init2(struct device *dev)
87{
88 u8 byte;
89 u16 word;
90 u32 dword;
Stefan Reinauer78b40332010-03-17 22:09:26 +000091 u32 usb2_bar0;
Michael Xie7586cef2008-09-22 13:11:39 +000092 /* dword = pci_read_config32(dev, 0xf8); */
93 /* dword |= 40; */
94 /* pci_write_config32(dev, 0xf8, dword); */
95
Stefan Reinauer78b40332010-03-17 22:09:26 +000096 usb2_bar0 = pci_read_config32(dev, 0x10) & ~0xFF;
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +000097 printk(BIOS_INFO, "usb2_bar0=0x%x\n", usb2_bar0);
Michael Xie7586cef2008-09-22 13:11:39 +000098
Zheng Bao2a5101a2010-10-10 15:18:53 +000099 /* RPR5.4 Enables the USB PHY auto calibration resister to match 45ohm resistance */
Michael Xie7586cef2008-09-22 13:11:39 +0000100 dword = 0x00020F00;
Stefan Reinauer9fe4d792010-01-16 17:53:38 +0000101 write32(usb2_bar0 + 0xC0, dword);
Michael Xie7586cef2008-09-22 13:11:39 +0000102
103 /* RPR5.5 Sets In/OUT FIFO threshold for best performance */
104 dword = 0x00200040;
Stefan Reinauer9fe4d792010-01-16 17:53:38 +0000105 write32(usb2_bar0 + 0xA4, dword);
Michael Xie7586cef2008-09-22 13:11:39 +0000106
107 /* RPR5.9 Disable the EHCI Dynamic Power Saving feature */
Stefan Reinauer9fe4d792010-01-16 17:53:38 +0000108 word = read16(usb2_bar0 + 0xBC);
Michael Xie7586cef2008-09-22 13:11:39 +0000109 word &= ~(1 << 12);
Stefan Reinauer9fe4d792010-01-16 17:53:38 +0000110 write16(usb2_bar0 + 0xBC, word);
Michael Xie7586cef2008-09-22 13:11:39 +0000111
112 /* RPR5.10 Disable EHCI MSI support */
113 byte = pci_read_config8(dev, 0x50);
114 byte |= (1 << 6);
115 pci_write_config8(dev, 0x50, byte);
116
117 /* RPR5.13 Disable C3 time enhancement feature */
118 dword = pci_read_config32(dev, 0x50);
119 dword &= ~(1 << 28);
120 pci_write_config32(dev, 0x50, dword);
121
Patrick Georgi0f8590f2011-10-28 09:01:54 +0200122 /* EHCI Erratum (adapted from Linux) */
123 dword = pci_read_config32(dev, 0x53);
124 dword |= (1 << 3);
125 pci_write_config32(dev, 0x53, dword);
126
Michael Xie7586cef2008-09-22 13:11:39 +0000127 /* RPR5.14 Disable USB PHY PLL Reset signal to come from ACPI */
128 byte = pci_read_config8(dev, 0x54);
129 byte &= ~(1 << 0);
130 pci_write_config8(dev, 0x54, byte);
131}
132
133static void usb_set_resources(struct device *dev)
134{
Stefan Reinauer7e00a442010-05-25 17:09:05 +0000135#if CONFIG_USBDEBUG
Michael Xie7586cef2008-09-22 13:11:39 +0000136 struct resource *res;
137 u32 base;
138 u32 old_debug;
139
140 old_debug = get_ehci_debug();
141 set_ehci_debug(0);
142#endif
143 pci_dev_set_resources(dev);
144
Stefan Reinauer7e00a442010-05-25 17:09:05 +0000145#if CONFIG_USBDEBUG
Michael Xie7586cef2008-09-22 13:11:39 +0000146 res = find_resource(dev, 0x10);
147 set_ehci_debug(old_debug);
148 if (!res)
149 return;
150 base = res->base;
151 set_ehci_base(base);
152 report_resource_stored(dev, res, "");
153#endif
154
155}
156
157static struct device_operations usb_ops = {
158 .read_resources = pci_dev_read_resources,
159 .set_resources = usb_set_resources, /* pci_dev_set_resources, */
160 .enable_resources = pci_dev_enable_resources,
161 .init = usb_init,
162 /*.enable = sb600_enable, */
163 .scan_bus = 0,
164 .ops_pci = &lops_pci,
165};
166
Patrick Georgiefff7332012-07-26 19:48:23 +0200167static const unsigned short usb_ids[] = {
168 PCI_DEVICE_ID_ATI_SB600_USB_0,
169 PCI_DEVICE_ID_ATI_SB600_USB_1,
170 PCI_DEVICE_ID_ATI_SB600_USB_2,
171 PCI_DEVICE_ID_ATI_SB600_USB_3,
172 PCI_DEVICE_ID_ATI_SB600_USB_4,
173 0,
174};
175
Stefan Reinauer8e96ba22010-03-16 23:33:29 +0000176static const struct pci_driver usb_0_driver __pci_driver = {
Michael Xie7586cef2008-09-22 13:11:39 +0000177 .ops = &usb_ops,
178 .vendor = PCI_VENDOR_ID_ATI,
Patrick Georgiefff7332012-07-26 19:48:23 +0200179 .devices= usb_ids,
Michael Xie7586cef2008-09-22 13:11:39 +0000180};
181
182static struct device_operations usb_ops2 = {
183 .read_resources = pci_dev_read_resources,
184 .set_resources = usb_set_resources, /* pci_dev_set_resources, */
185 .enable_resources = pci_dev_enable_resources,
186 .init = usb_init2,
187 /*.enable = sb600_enable, */
188 .scan_bus = 0,
189 .ops_pci = &lops_pci,
190};
191
Stefan Reinauer8e96ba22010-03-16 23:33:29 +0000192static const struct pci_driver usb_5_driver __pci_driver = {
Michael Xie7586cef2008-09-22 13:11:39 +0000193 .ops = &usb_ops2,
194 .vendor = PCI_VENDOR_ID_ATI,
195 .device = PCI_DEVICE_ID_ATI_SB600_USB2,
196};
197