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review.coreboot.org / coreboot / ef886c4ede4fd09558d568e13376246fe13badf3 / . / src / mainboard / protectli / vault_cml / gpio.c
blob: 72faae97c08be04072d3b6989d487b4ddeb61153 [file] [log] [blame]
Michał Żygowskief886c42022-09-29 00:58:43 +0200[diff] [blame^]1/* SPDX-License-Identifier: GPL-2.0-only */
2
3#ifndef CFG_GPIO_H
4#define CFG_GPIO_H
5
6#include "gpio.h"
7
8/* Pad configuration was generated automatically using intelp2m utility */
9static const struct pad_config gpio_table[] = {
10
11 /* ------- GPIO Community 0 ------- */
12 /* ------- GPIO Group GPP_A ------- */
13
14 /* GPP_A0 - RCIN# */
15 PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
16 /* GPP_A1 - LAD0 */
17 PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),
18 /* GPP_A2 - LAD1 */
19 PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),
20 /* GPP_A3 - LAD2 */
21 PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),
22 /* GPP_A4 - LAD3 */
23 PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),
24 /* GPP_A5 - LFRAME# */
25 PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
26 /* GPP_A6 - SERIRQ */
27 PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
28 /* GPP_A7 - PIRQA# */
29 PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1),
30 /* GPP_A8 - CLKRUN# */
31 PAD_CFG_NF(GPP_A8, NONE, PLTRST, NF1),
32 /* GPP_A9 - CLKOUT_LPC0 */
33 PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
34 /* GPP_A10 - CLKOUT_LPC1 */
35 PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
36 /* GPP_A11 - PME# */
37 PAD_CFG_NF(GPP_A11, UP_20K, DEEP, NF1),
38 /* GPP_A12 - GPIO */
39 PAD_NC(GPP_A12, NONE),
40 /* GPP_A13 - GPIO */
41 PAD_NC(GPP_A13, NONE),
42 /* GPP_A14 - GPIO */
43 PAD_NC(GPP_A14, NONE),
44 /* GPP_A15 - GPIO */
45 PAD_NC(GPP_A15, NONE),
46 /* GPP_A16 - GPIO */
47 PAD_NC(GPP_A16, NONE),
48 /* GPP_A17 - GPIO */
49 PAD_NC(GPP_A17, NONE),
50 /* GPP_A18 - GPIO */
51 PAD_NC(GPP_A18, NONE),
52 /* GPP_A19 - GPIO */
53 PAD_NC(GPP_A19, NONE),
54 /* GPP_A20 - GPIO */
55 PAD_NC(GPP_A20, NONE),
56 /* GPP_A21 - GPIO */
57 PAD_NC(GPP_A21, NONE),
58 /* GPP_A22 - GPIO */
59 PAD_NC(GPP_A22, NONE),
60 /* GPP_A23 - GPIO */
61 PAD_NC(GPP_A23, NONE),
62
63 /* ------- GPIO Group GPP_B ------- */
64
65 /* GPP_B0 - CORE_VID0 */
66 PAD_NC(GPP_B0, NONE),
67 /* GPP_B1 - CORE_VID1 */
68 PAD_NC(GPP_B1, NONE),
69 /* GPP_B2 - GPIO */
70 PAD_NC(GPP_B2, NONE),
71 /* GPP_B3 - GPIO */
72 PAD_NC(GPP_B3, NONE),
73 /* GPP_B4 - GPIO */
74 PAD_NC(GPP_B4, NONE),
75 /* GPP_B5 - GPIO */
76 PAD_NC(GPP_B5, NONE),
77 /* GPP_B6 - GPIO */
78 PAD_NC(GPP_B6, NONE),
79 /* GPP_B7 - GPIO */
80 PAD_NC(GPP_B7, NONE),
81 /* GPP_B8 - GPIO */
82 PAD_NC(GPP_B8, NONE),
83 /* GPP_B9 - GPIO */
84 PAD_NC(GPP_B9, NONE),
85 /* GPP_B10 - GPIO */
86 PAD_NC(GPP_B10, NONE),
87 /* GPP_B11 - EXT_PWR_GATE# */
88 PAD_NC(GPP_B11, NONE),
89 /* GPP_B12 - SLP_S0# */
90 PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
91 /* GPP_B13 - PLTRST# */
92 PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
93 /* GPP_B14 - SPKR */
94 PAD_CFG_NF(GPP_B14, DN_20K, PLTRST, NF1),
95 /* GPP_B15 - GPIO */
96 PAD_NC(GPP_B15, NONE),
97 /* GPP_B16 - GPIO */
98 PAD_NC(GPP_B16, NONE),
99 /* GPP_B17 - GPIO */
100 PAD_NC(GPP_B17, NONE),
101 /* GPP_B18 - GPIO */
102 PAD_NC(GPP_B18, NONE),
103 /* GPP_B19 - GPIO */
104 PAD_NC(GPP_B19, NONE),
105 /* GPP_B20 - GPIO */
106 PAD_NC(GPP_B20, NONE),
107 /* GPP_B21 - GPIO */
108 PAD_NC(GPP_B21, NONE),
109 /* GPP_B22 - GPIO */
110 PAD_NC(GPP_B22, NONE),
111 /* GPP_B23 - GPIO */
112 PAD_NC(GPP_B23, NONE),
113
114 /* ------- GPIO Group GPP_G ------- */
115
116 /* GPP_G0 - GPIO */
117 PAD_NC(GPP_G0, NONE),
118 /* GPP_G1 - GPIO */
119 PAD_NC(GPP_G1, NONE),
120 /* GPP_G2 - GPIO */
121 PAD_NC(GPP_G2, NONE),
122 /* GPP_G3 - GPIO */
123 PAD_NC(GPP_G3, NONE),
124 /* GPP_G4 - GPIO */
125 PAD_NC(GPP_G4, NONE),
126 /* GPP_G5 - SD3_CD# */
127 PAD_NC(GPP_G5, NONE),
128 /* GPP_G6 - GPIO */
129 PAD_NC(GPP_G6, NONE),
130 /* GPP_G7 - SD3_WP */
131 PAD_NC(GPP_G7, NONE),
132
133 /* ------- GPIO Group SPI ------- */
134
135 /* ------- GPIO Community 1 ------- */
136
137 /* ------- GPIO Group GPP_D ------- */
138
139 /* GPP_D0 - GPIO */
140 PAD_NC(GPP_D0, NONE),
141 /* GPP_D1 - GPIO */
142 PAD_NC(GPP_D1, NONE),
143 /* GPP_D2 - GPIO */
144 PAD_NC(GPP_D2, NONE),
145 /* GPP_D3 - GPIO */
146 PAD_NC(GPP_D3, NONE),
147 /* GPP_D4 - GPIO */
148 PAD_NC(GPP_D4, NONE),
149 /* GPP_D5 - GPIO */
150 PAD_NC(GPP_D5, NONE),
151 /* GPP_D6 - GPIO */
152 PAD_NC(GPP_D6, NONE),
153 /* GPP_D7 - GPIO */
154 PAD_NC(GPP_D7, NONE),
155 /* GPP_D8 - GPIO */
156 PAD_NC(GPP_D8, NONE),
157 /* GPP_D9 - GPIO */
158 PAD_NC(GPP_D9, NONE),
159 /* GPP_D10 - GPIO */
160 PAD_NC(GPP_D10, NONE),
161 /* GPP_D11 - GPIO */
162 PAD_NC(GPP_D11, NONE),
163 /* GPP_D12 - GPIO */
164 PAD_NC(GPP_D12, NONE),
165 /* GPP_D13 - GPIO */
166 PAD_NC(GPP_D13, NONE),
167 /* GPP_D14 - GPIO */
168 PAD_NC(GPP_D14, NONE),
169 /* GPP_D15 - GPIO */
170 PAD_NC(GPP_D15, NONE),
171 /* GPP_D16 - GPIO */
172 PAD_NC(GPP_D16, NONE),
173 /* GPP_D17 - GPIO */
174 PAD_NC(GPP_D17, NONE),
175 /* GPP_D18 - GPIO */
176 PAD_NC(GPP_D18, NONE),
177 /* GPP_D19 - GPIO */
178 PAD_NC(GPP_D19, NONE),
179 /* GPP_D20 - GPIO */
180 PAD_NC(GPP_D20, NONE),
181 /* GPP_D21 - SPI1_IO2 */
182 PAD_NC(GPP_D21, NONE),
183 /* GPP_D22 - SPI1_IO3 */
184 PAD_NC(GPP_D22, NONE),
185 /* GPP_D23 - GPIO */
186 PAD_NC(GPP_D23, NONE),
187
188 /* ------- GPIO Group GPP_F ------- */
189
190 /* GPP_F0 - GPIO */
191 PAD_NC(GPP_F0, NONE),
192 /* GPP_F1 - GPIO */
193 PAD_NC(GPP_F1, NONE),
194 /* GPP_F2 - GPIO */
195 PAD_NC(GPP_F2, NONE),
196 /* GPP_F3 - GPIO */
197 PAD_NC(GPP_F3, NONE),
198 /* GPP_F4 - GPIO */
199 PAD_NC(GPP_F4, NONE),
200 /* GPP_F5 - GPIO */
201 PAD_NC(GPP_F5, NONE),
202 /* GPP_F6 - GPIO */
203 PAD_NC(GPP_F6, NONE),
204 /* GPP_F7 - GPIO */
205 PAD_NC(GPP_F7, NONE),
206 /* GPP_F8 - GPIO */
207 PAD_NC(GPP_F8, NONE),
208 /* GPP_F9 - GPIO */
209 PAD_NC(GPP_F9, NONE),
210 /* GPP_F10 - GPIO */
211 PAD_NC(GPP_F10, NONE),
212 /* GPP_F11 - EMMC_CMD */
213 PAD_CFG_NF(GPP_F11, NONE, DEEP, NF1),
214 /* GPP_F12 - EMMC_DATA0 */
215 PAD_CFG_NF(GPP_F12, NONE, DEEP, NF1),
216 /* GPP_F13 - EMMC_DATA1 */
217 PAD_CFG_NF(GPP_F13, NONE, DEEP, NF1),
218 /* GPP_F14 - EMMC_DATA2 */
219 PAD_CFG_NF(GPP_F14, NONE, DEEP, NF1),
220 /* GPP_F15 - EMMC_DATA3 */
221 PAD_CFG_NF(GPP_F15, NONE, DEEP, NF1),
222 /* GPP_F16 - EMMC_DATA4 */
223 PAD_CFG_NF(GPP_F16, NONE, DEEP, NF1),
224 /* GPP_F17 - EMMC_DATA5 */
225 PAD_CFG_NF(GPP_F17, NONE, DEEP, NF1),
226 /* GPP_F18 - EMMC_DATA6 */
227 PAD_CFG_NF(GPP_F18, NONE, DEEP, NF1),
228 /* GPP_F19 - EMMC_DATA7 */
229 PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
230 /* GPP_F20 - EMMC_RCLK */
231 PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
232 /* GPP_F21 - EMMC_CLK */
233 PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
234 /* GPP_F22 - EMMC_RESET# */
235 PAD_CFG_NF(GPP_F22, NONE, DEEP, NF1),
236 /* GPP_F23 - GPIO */
237 PAD_NC(GPP_F23, NONE),
238
239 /* ------- GPIO Group GPP_H ------- */
240
241 /* GPP_H0 - GPIO */
242 PAD_NC(GPP_H0, NONE),
243 /* GPP_H1 - GPIO# */
244 PAD_NC(GPP_H1, NONE),
245 /* GPP_H2 - GPIO */
246 PAD_NC(GPP_H2, NONE),
247 /* GPP_H3 - GPIO */
248 PAD_NC(GPP_H3, NONE),
249 /* GPP_H4 - GPIO */
250 PAD_NC(GPP_H4, NONE),
251 /* GPP_H5 - GPIO */
252 PAD_NC(GPP_H5, NONE),
253 /* GPP_H6 - GPIO */
254 PAD_NC(GPP_H6, NONE),
255 /* GPP_H7 - GPIO */
256 PAD_NC(GPP_H7, NONE),
257 /* GPP_H8 - GPIO */
258 PAD_NC(GPP_H8, NONE),
259 /* GPP_H9 - GPIO */
260 PAD_NC(GPP_H9, NONE),
261 /* GPP_H10 - GPIO */
262 PAD_NC(GPP_H10, NONE),
263 /* GPP_H11 - GPIO */
264 PAD_NC(GPP_H11, NONE),
265 /* GPP_H12 - GPIO */
266 PAD_NC(GPP_H12, NONE),
267 /* GPP_H13 - GPIO */
268 PAD_NC(GPP_H13, NONE),
269 /* GPP_H14 - GPIO */
270 PAD_NC(GPP_H14, NONE),
271 /* GPP_H15 - GPIO */
272 PAD_NC(GPP_H15, NONE),
273 /* GPP_H16 - GPIO */
274 PAD_NC(GPP_H16, NONE),
275 /* GPP_H17 - GPIO */
276 PAD_NC(GPP_H17, NONE),
277 /* GPP_H18 - CPU_C10_GATE# */
278 PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
279 /* GPP_H19 - GPIO */
280 PAD_NC(GPP_H19, NONE),
281 /* GPP_H20 - GPIO */
282 PAD_NC(GPP_H20, NONE),
283 /* GPP_H21 - GPIO */
284 PAD_NC(GPP_H21, NONE),
285 /* GPP_H22 - GPIO */
286 PAD_NC(GPP_H22, NONE),
287 /* GPP_H23 - GPIO */
288 PAD_NC(GPP_H23, NONE),
289
290 /* ------- GPIO Group VGPIO ------- */
291
292 /* ------- GPIO Community 2 ------- */
293
294 /* ------- GPIO Group GPD ------- */
295
296 /* GPD0 - BATLOW# */
297 PAD_CFG_NF(GPD0, NONE, RSMRST, NF1),
298 /* GPD1 - ACPRESENT */
299 PAD_CFG_NF(GPD1, NATIVE, RSMRST, NF1),
300 /* GPD2 - LAN_WAKE# */
301 PAD_CFG_NF(GPD2, NATIVE, RSMRST, NF1),
302 /* GPD3 - PRWBTN# */
303 PAD_CFG_NF(GPD3, UP_20K, RSMRST, NF1),
304 /* GPD4 - SLP_S3# */
305 PAD_CFG_NF(GPD4, NONE, RSMRST, NF1),
306 /* GPD5 - SLP_S4# */
307 PAD_CFG_NF(GPD5, NONE, RSMRST, NF1),
308 /* GPD6 - SLP_A# */
309 PAD_NC(GPD6, NONE),
310 /* GPD7 - GPIO */
311 PAD_NC(GPD7, NONE),
312 /* GPD8 - SUSCLK */
313 PAD_NC(GPD8, NONE),
314 /* GPD9 - GPIO */
315 PAD_NC(GPD9, NONE),
316 /* GPD10 - SLP_S5# */
317 PAD_NC(GPD10, NONE),
318 /* GPD11 - GPIO */
319 PAD_NC(GPD11, NONE),
320
321 /* ------- GPIO Community 3 ------- */
322
323 /* ------- GPIO Group AZA ------- */
324
325 /* ------- GPIO Group CPU ------- */
326
327 /* ------- GPIO Community 4 ------- */
328
329 /* ------- GPIO Group GPP_C ------- */
330
331 /* GPP_C0 - SMBCLK */
332 PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
333 /* GPP_C1 - SMBDATA */
334 PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
335 /* GPP_C2 - GPIO */
336 PAD_NC(GPP_C2, NONE),
337 /* GPP_C3 - SML0CLK */
338 PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
339 /* GPP_C4 - SML0DATA */
340 PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
341 /* GPP_C5 - GPIO */
342 PAD_NC(GPP_C5, NONE),
343 /* GPP_C6 - SML1CLK */
344 PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),
345 /* GPP_C7 - SML1DATA */
346 PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),
347 /* GPP_C8 - GPIO */
348 PAD_NC(GPP_C8, NONE),
349 /* GPP_C9 - GPIO */
350 PAD_NC(GPP_C9, NONE),
351 /* GPP_C10 - GPIO */
352 PAD_NC(GPP_C10, NONE),
353 /* GPP_C11 - GPIO */
354 PAD_NC(GPP_C11, NONE),
355 /* GPP_C12 - GPIO */
356 PAD_NC(GPP_C12, NONE),
357 /* GPP_C13 - GPIO */
358 PAD_NC(GPP_C13, NONE),
359 /* GPP_C14 - GPIO */
360 PAD_NC(GPP_C14, NONE),
361 /* GPP_C15 - GPIO */
362 PAD_NC(GPP_C15, NONE),
363 /* GPP_C16 - GPIO */
364 PAD_NC(GPP_C16, NONE),
365 /* GPP_C17 - GPIO */
366 PAD_NC(GPP_C17, NONE),
367 /* GPP_C18 - GPIO */
368 PAD_NC(GPP_C18, NONE),
369 /* GPP_C19 - GPIO */
370 PAD_NC(GPP_C19, NONE),
371 /* GPP_C20 - GPIO */
372 PAD_NC(GPP_C20, NONE),
373 /* GPP_C21 - GPIO */
374 PAD_NC(GPP_C21, NONE),
375 /* GPP_C22 - GPIO */
376 PAD_NC(GPP_C22, NONE),
377 /* GPP_C23 - GPIO */
378 PAD_NC(GPP_C23, NONE),
379
380 /* ------- GPIO Group GPP_E ------- */
381
382 /* GPP_E0 - GPIO */
383 PAD_NC(GPP_E0, NONE),
384 /* GPP_E1 - GPIO */
385 PAD_NC(GPP_E1, NONE),
386 /* GPP_E2 - SATAXPCIE2 */
387 PAD_CFG_NF(GPP_E2, UP_20K, PLTRST, NF1),
388 /* GPP_E3 - GPIO */
389 PAD_NC(GPP_E3, NONE),
390 /* GPP_E4 - GPIO */
391 PAD_NC(GPP_E4, NONE),
392 /* GPP_E5 - GPIO */
393 PAD_NC(GPP_E5, NONE),
394 /* GPP_E6 - GPIO */
395 PAD_NC(GPP_E6, NONE),
396 /* GPP_E7 - GPIO */
397 PAD_NC(GPP_E7, NONE),
398 /* GPP_E8 - SATALED# */
399 PAD_CFG_NF(GPP_E8, NONE, PLTRST, NF1),
400 /* GPP_E9 - RESERVED */
401 PAD_NC(GPP_E9, NONE),
402 /* GPP_E10 - RESERVED */
403 PAD_NC(GPP_E10, NONE),
404 /* GPP_E11 - GPIO */
405 PAD_NC(GPP_E11, NONE),
406 /* GPP_E12 - GPIO */
407 PAD_NC(GPP_E12, NONE),
408 /* GPP_E13 - DDPB_HPD0 */
409 PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
410 /* GPP_E14 - DDPC_HPD1 */
411 PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
412 /* GPP_E15 - DDPD_HPD2 */
413 PAD_NC(GPP_E15, NONE),
414 /* GPP_E16 - GPIO */
415 PAD_NC(GPP_E16, NONE),
416 /* GPP_E17 - EDP_HPD */
417 PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
418 /* GPP_E18 - DPPB_CTRLCLK */
419 PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1),
420 /* GPP_E19 - DPPB_CTRLDATA */
421 PAD_CFG_NF(GPP_E19, NONE, DEEP, NF1),
422 /* GPP_E20 - DPPC_CTRLCLK */
423 PAD_NC(GPP_E20, NONE),
424 /* GPP_E21 - DPPC_CTRLDATA */
425 PAD_NC(GPP_E21, NONE),
426 /* GPP_E22 - DPPD_CTRLCLK */
427 PAD_NC(GPP_E22, NONE),
428 /* GPP_E23 - DPPD_CTRLDATA */
429 PAD_NC(GPP_E23, NONE),
430
431 /* ------- GPIO Group JTAG ------- */
432
433 /* ------- GPIO Group HVMOS ------- */
434};
435
436const struct pad_config *board_gpio_table(size_t *num)
437{
438 *num = ARRAY_SIZE(gpio_table);
439 return gpio_table;
440}
441
442#endif /* CFG_GPIO_H */