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CK Hu958ab462020-04-07 12:06:31 +08001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <device/device.h>
Chien-Chih Tsenga39ea902020-12-14 14:59:39 +08004#include <soc/apusys.h>
Nina Wu87c30a02020-09-04 10:11:27 +08005#include <soc/devapc.h>
CK Hu958ab462020-04-07 12:06:31 +08006#include <soc/emi.h>
Yidi Linf4bf8f5f2020-07-29 19:18:38 +08007#include <soc/mcupm.h>
CK Hu3398f3152020-06-16 11:54:38 +08008#include <soc/mmu_operations.h>
TingHan.Shenbe404c22020-11-20 14:42:23 +08009#include <soc/sspm.h>
Wenbin Mei19858942020-09-25 10:03:02 +080010#include <soc/ufs.h>
CK Hu958ab462020-04-07 12:06:31 +080011#include <symbols.h>
12
13static void soc_read_resources(struct device *dev)
14{
15 ram_resource(dev, 0, (uintptr_t)_dram / KiB, sdram_size() / KiB);
16}
17
18static void soc_init(struct device *dev)
19{
CK Hu3398f3152020-06-16 11:54:38 +080020 mtk_mmu_disable_l2c_sram();
Chien-Chih Tsenga39ea902020-12-14 14:59:39 +080021 apusys_init();
Nina Wu87c30a02020-09-04 10:11:27 +080022 dapc_init();
Yidi Linf4bf8f5f2020-07-29 19:18:38 +080023 mcupm_init();
TingHan.Shenbe404c22020-11-20 14:42:23 +080024 sspm_init();
Wenbin Mei19858942020-09-25 10:03:02 +080025 ufs_disable_refclk();
CK Hu958ab462020-04-07 12:06:31 +080026}
27
28static struct device_operations soc_ops = {
29 .read_resources = soc_read_resources,
30 .init = soc_init,
31};
32
33static void enable_soc_dev(struct device *dev)
34{
35 dev->ops = &soc_ops;
36}
37
38struct chip_operations soc_mediatek_mt8192_ops = {
39 CHIP_NAME("SOC Mediatek MT8192")
40 .enable_dev = enable_soc_dev,
41};