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CK Hu958ab462020-04-07 12:06:31 +08001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <device/device.h>
4#include <soc/emi.h>
Yidi Linf4bf8f5f2020-07-29 19:18:38 +08005#include <soc/mcupm.h>
CK Hu3398f3152020-06-16 11:54:38 +08006#include <soc/mmu_operations.h>
TingHan.Shenbe404c22020-11-20 14:42:23 +08007#include <soc/sspm.h>
Wenbin Mei19858942020-09-25 10:03:02 +08008#include <soc/ufs.h>
CK Hu958ab462020-04-07 12:06:31 +08009#include <symbols.h>
10
11static void soc_read_resources(struct device *dev)
12{
13 ram_resource(dev, 0, (uintptr_t)_dram / KiB, sdram_size() / KiB);
14}
15
16static void soc_init(struct device *dev)
17{
CK Hu3398f3152020-06-16 11:54:38 +080018 mtk_mmu_disable_l2c_sram();
Yidi Linf4bf8f5f2020-07-29 19:18:38 +080019 mcupm_init();
TingHan.Shenbe404c22020-11-20 14:42:23 +080020 sspm_init();
Wenbin Mei19858942020-09-25 10:03:02 +080021 ufs_disable_refclk();
CK Hu958ab462020-04-07 12:06:31 +080022}
23
24static struct device_operations soc_ops = {
25 .read_resources = soc_read_resources,
26 .init = soc_init,
27};
28
29static void enable_soc_dev(struct device *dev)
30{
31 dev->ops = &soc_ops;
32}
33
34struct chip_operations soc_mediatek_mt8192_ops = {
35 CHIP_NAME("SOC Mediatek MT8192")
36 .enable_dev = enable_soc_dev,
37};