Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Tristan Corrick | 921a4cf | 2018-08-02 19:41:08 +1200 | [diff] [blame] | 2 | |
Arthur Heymans | fa5d0f8 | 2019-11-12 19:11:50 +0100 | [diff] [blame] | 3 | #include <bootblock_common.h> |
Tristan Corrick | 921a4cf | 2018-08-02 19:41:08 +1200 | [diff] [blame] | 4 | #include <southbridge/intel/bd82x6x/pch.h> |
| 5 | #include <superio/nuvoton/common/nuvoton.h> |
| 6 | #include <superio/nuvoton/nct6776/nct6776.h> |
| 7 | |
| 8 | #define SERIAL_DEV PNP_DEV(0x2e, NCT6776_SP1) |
| 9 | |
| 10 | const struct southbridge_usb_port mainboard_usb_ports[] = { |
| 11 | { 1, 0, 0 }, |
| 12 | { 1, 0, 0 }, |
| 13 | { 1, 0, 1 }, |
| 14 | { 1, 0, 1 }, |
| 15 | { 1, 0, 2 }, |
| 16 | { 1, 0, 2 }, |
| 17 | { 1, 0, 3 }, |
| 18 | { 1, 0, 3 }, |
| 19 | { 1, 0, 4 }, |
| 20 | { 1, 0, 4 }, |
| 21 | { 1, 0, 5 }, |
| 22 | { 1, 0, 5 }, |
| 23 | { 1, 0, 6 }, |
| 24 | { 1, 0, 6 }, |
| 25 | }; |
| 26 | |
Arthur Heymans | fa5d0f8 | 2019-11-12 19:11:50 +0100 | [diff] [blame] | 27 | void bootblock_mainboard_early_init(void) |
Tristan Corrick | 921a4cf | 2018-08-02 19:41:08 +1200 | [diff] [blame] | 28 | { |
| 29 | nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
| 30 | } |