Angel Pons | 5f1bf2f | 2020-04-03 01:21:16 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
devmaster64 | 3f888ef | 2019-01-09 11:42:32 +0530 | [diff] [blame] | 2 | |
Arthur Heymans | fa5d0f8 | 2019-11-12 19:11:50 +0100 | [diff] [blame] | 3 | #include <bootblock_common.h> |
Kyösti Mälkki | 3855c01 | 2019-03-03 08:45:19 +0200 | [diff] [blame] | 4 | #include <device/pnp_ops.h> |
devmaster64 | 3f888ef | 2019-01-09 11:42:32 +0530 | [diff] [blame] | 5 | #include <southbridge/intel/bd82x6x/pch.h> |
| 6 | #include <superio/nuvoton/common/nuvoton.h> |
| 7 | #include <superio/nuvoton/nct6779d/nct6779d.h> |
| 8 | |
| 9 | #define SIO_PORT 0x2e |
| 10 | #define SIO_DEV PNP_DEV(SIO_PORT, 0) |
| 11 | #define ACPI_DEV PNP_DEV(SIO_PORT, NCT6779D_ACPI) |
| 12 | |
devmaster64 | 3f888ef | 2019-01-09 11:42:32 +0530 | [diff] [blame] | 13 | const struct southbridge_usb_port mainboard_usb_ports[] = { |
| 14 | { 1, 0, 0 }, |
| 15 | { 1, 0, 0 }, |
| 16 | { 1, 0, 1 }, |
| 17 | { 1, 0, 1 }, |
| 18 | { 1, 0, 2 }, |
| 19 | { 1, 0, 2 }, |
| 20 | { 1, 0, 3 }, |
| 21 | { 1, 0, 3 }, |
| 22 | { 1, 0, 4 }, |
| 23 | { 1, 0, 4 }, |
| 24 | { 1, 0, 6 }, |
| 25 | { 1, 0, 5 }, |
| 26 | { 1, 0, 5 }, |
| 27 | { 1, 0, 6 }, |
| 28 | }; |
| 29 | |
Arthur Heymans | fa5d0f8 | 2019-11-12 19:11:50 +0100 | [diff] [blame] | 30 | void bootblock_mainboard_early_init(void) |
devmaster64 | 3f888ef | 2019-01-09 11:42:32 +0530 | [diff] [blame] | 31 | { |
| 32 | nuvoton_pnp_enter_conf_state(SIO_DEV); |
| 33 | pnp_set_logical_device(ACPI_DEV); |
| 34 | pnp_write_config(ACPI_DEV, 0xe4, 0x10); |
| 35 | nuvoton_pnp_exit_conf_state(SIO_DEV); |
| 36 | } |