blob: f7f0a7c5c8b53f326554b4f2a9f09131bb78e679 [file] [log] [blame]
Uwe Hermann0120e1a2007-09-16 18:11:03 +00001/*
2 * This file is part of the LinuxBIOS project.
3 *
4 * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include "superiotool.h"
22
Uwe Hermann07024692007-09-20 22:13:48 +000023#define DEVICE_ID_BYTE1_REG 0x20
24#define DEVICE_ID_BYTE2_REG 0x21
25#define VENDOR_ID_BYTE1_REG 0x23
26#define VENDOR_ID_BYTE2_REG 0x24
27
28const static struct superio_registers reg_table[] = {
29 {0x0604, "F71805", {
30 {EOT}}},
31 {0x4103, "F71872", {
32 {EOT}}},
33 {EOT}
34};
35
Uwe Hermanneddc4732007-09-20 23:57:44 +000036static void dump_readable_fintek(uint16_t port, uint16_t did)
Uwe Hermann0120e1a2007-09-16 18:11:03 +000037{
Uwe Hermanneddc4732007-09-20 23:57:44 +000038 if (!dump_readable)
39 return;
40
Uwe Hermann0120e1a2007-09-16 18:11:03 +000041 switch (did) {
42 case 0x0604:
43 printf("Fintek F71805\n");
44 break;
45 case 0x4103:
46 printf("Fintek F71872\n");
47 break;
48 default:
49 printf("Unknown Fintek Super I/O: did=0x%04x\n", did);
50 return;
51 }
52
53 printf("Flash write is %s.\n",
54 regval(port, 0x28) & 0x80 ? "enabled" : "disabled");
55 printf("Flash control is 0x%04x.\n", regval(port, 0x28));
56 printf("27=%02x\n", regval(port, 0x27));
57 printf("29=%02x\n", regval(port, 0x29));
58 printf("2a=%02x\n", regval(port, 0x2a));
59 printf("2b=%02x\n", regval(port, 0x2b));
60
61 /* Select UART 1. */
62 regwrite(port, 0x07, 0x01);
63 printf("UART1 is %s\n",
64 regval(port, 0x30) & 1 ? "enabled" : "disabled");
65 printf("UART1 base=%02x%02x, irq=%02x, mode=%s\n", regval(port, 0x60),
66 regval(port, 0x61), regval(port, 0x70) & 0x0f,
67 regval(port, 0xf0) & 0x10 ? "RS485" : "RS232");
68
69 /* Select UART 2. */
70 regwrite(port, 0x07, 0x02);
71 printf("UART2 is %s\n",
72 regval(port, 0x30) & 1 ? "enabled" : "disabled");
73 printf("UART2 base=%02x%02x, irq=%02x, mode=%s\n", regval(port, 0x60),
74 regval(port, 0x61), regval(port, 0x70) & 0x0f,
75 regval(port, 0xf0) & 0x10 ? "RS485" : "RS232");
76
77 /* Select parallel port. */
78 regwrite(port, 0x07, 0x03);
79 printf("PARPORT is %s\n",
80 regval(port, 0x30) & 1 ? "enabled" : "disabled");
81 printf("PARPORT base=%02x%02x, irq=%02x\n", regval(port, 0x60),
82 regval(port, 0x61), regval(port, 0x70) & 0x0f);
83
84 /* Select HW monitor. */
85 regwrite(port, 0x07, 0x04);
86 printf("HW monitor is %s\n",
87 regval(port, 0x30) & 1 ? "enabled" : "disabled");
88 printf("HW monitor base=%02x%02x, irq=%02x\n", regval(port, 0x60),
89 regval(port, 0x61), regval(port, 0x70) & 0x0f);
90
91 /* Select GPIO. */
92 regwrite(port, 0x07, 0x05);
93 printf("GPIO is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
94 printf
95 ("GPIO 70=%02x, e0=%02x, e1=%02x, e2=%02x, e3=%02x, e4=%02x, e5=%02x\n",
96 regval(port, 0x70), regval(port, 0xe0), regval(port, 0xe1),
97 regval(port, 0xe2), regval(port, 0xe3), regval(port, 0xe4),
98 regval(port, 0xe5));
99 printf
100 ("GPIO e6=%02x, e7=%02x, e8=%02x, e9=%02x, f0=%02x, f1=%02x, f3=%02x, f4=%02x\n",
101 regval(port, 0xe6), regval(port, 0xe7), regval(port, 0xe8),
102 regval(port, 0xe9), regval(port, 0xf0), regval(port, 0xf1),
103 regval(port, 0xf3), regval(port, 0xf4));
104 printf("GPIO f5=%02x, f6=%02x, f7=%02x, f8=%02x\n", regval(port, 0xf5),
105 regval(port, 0xf6), regval(port, 0xf7), regval(port, 0xf8));
106}
107
Uwe Hermann25a6c0f2007-09-19 00:48:42 +0000108void probe_idregs_fintek(uint16_t port)
109{
Uwe Hermannb4db2202007-09-20 23:37:56 +0000110 uint16_t vid, did;
Uwe Hermann25a6c0f2007-09-19 00:48:42 +0000111
Uwe Hermannb4db2202007-09-20 23:37:56 +0000112 enter_conf_mode_winbond_fintek_ite_8787(port);
Uwe Hermann0120e1a2007-09-16 18:11:03 +0000113
Uwe Hermann07024692007-09-20 22:13:48 +0000114 did = regval(port, DEVICE_ID_BYTE1_REG);
115 did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
Uwe Hermann07024692007-09-20 22:13:48 +0000116
117 vid = regval(port, VENDOR_ID_BYTE1_REG);
118 vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
119
Uwe Hermannb4db2202007-09-20 23:37:56 +0000120 if (vid != 0x3419) {
Uwe Hermann3acf31e2007-09-19 01:55:35 +0000121 no_superio_found(port);
Uwe Hermannb4db2202007-09-20 23:37:56 +0000122 exit_conf_mode_winbond_fintek_ite_8787(port);
Uwe Hermann07024692007-09-20 22:13:48 +0000123 return;
124 }
125
126 printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at port=0x%x\n",
127 get_superio_name(reg_table, did), vid, did, port);
Uwe Hermann0120e1a2007-09-16 18:11:03 +0000128
Uwe Hermannb4db2202007-09-20 23:37:56 +0000129 dump_superio("Fintek", reg_table, port, did);
Uwe Hermanneddc4732007-09-20 23:57:44 +0000130 dump_readable_fintek(port, did);
Uwe Hermann0120e1a2007-09-16 18:11:03 +0000131
Uwe Hermannb4db2202007-09-20 23:37:56 +0000132 exit_conf_mode_winbond_fintek_ite_8787(port);
Uwe Hermann0120e1a2007-09-16 18:11:03 +0000133}
134