Angel Pons | 118a9c7 | 2020-04-02 23:48:34 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 2 | |
| 3 | #include <arch/io.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 4 | #include <device/mmio.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 5 | #include <device/pci_ops.h> |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 6 | #include <console/console.h> |
| 7 | #include <delay.h> |
| 8 | #include <device/device.h> |
| 9 | #include <device/resource.h> |
| 10 | #include <device/pci.h> |
| 11 | #include <stdint.h> |
| 12 | #include <reg_script.h> |
| 13 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 14 | #if CONFIG(ARCH_X86) |
Duncan Laurie | fd461e3 | 2013-11-08 23:00:24 -0800 | [diff] [blame] | 15 | #include <cpu/x86/msr.h> |
| 16 | #endif |
| 17 | |
Arthur Heymans | d980211 | 2019-11-19 18:46:44 +0100 | [diff] [blame] | 18 | #define HAS_IOSF (CONFIG(SOC_INTEL_BAYTRAIL)) |
Werner Zeh | 9d02153 | 2016-02-19 10:02:49 +0100 | [diff] [blame] | 19 | |
| 20 | #if HAS_IOSF |
Julius Werner | 18ea2d3 | 2014-10-07 16:42:17 -0700 | [diff] [blame] | 21 | #include <soc/iosf.h> /* TODO: wrap in <soc/reg_script.h, remove #ifdef? */ |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 22 | #endif |
| 23 | |
| 24 | #define POLL_DELAY 100 /* 100us */ |
Kyösti Mälkki | e3acc8f | 2019-09-13 10:49:20 +0300 | [diff] [blame] | 25 | |
| 26 | #ifdef __SIMPLE_DEVICE__ |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 27 | #define EMPTY_DEV 0 |
| 28 | #else |
| 29 | #define EMPTY_DEV NULL |
| 30 | #endif |
| 31 | |
Elyes HAOUAS | f9e47cc | 2018-12-05 11:03:36 +0100 | [diff] [blame] | 32 | #ifdef __SIMPLE_DEVICE__ |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 33 | static inline void reg_script_set_dev(struct reg_script_context *ctx, |
Elyes HAOUAS | f9e47cc | 2018-12-05 11:03:36 +0100 | [diff] [blame] | 34 | pci_devfn_t dev) |
| 35 | #else |
| 36 | static inline void reg_script_set_dev(struct reg_script_context *ctx, |
| 37 | struct device *dev) |
| 38 | #endif |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 39 | { |
| 40 | ctx->dev = dev; |
| 41 | ctx->res = NULL; |
| 42 | } |
| 43 | |
| 44 | static inline void reg_script_set_step(struct reg_script_context *ctx, |
Lee Leahy | e20a319 | 2017-03-09 16:21:34 -0800 | [diff] [blame] | 45 | const struct reg_script *step) |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 46 | { |
| 47 | ctx->step = step; |
| 48 | } |
| 49 | |
| 50 | static inline const struct reg_script * |
| 51 | reg_script_get_step(struct reg_script_context *ctx) |
| 52 | { |
| 53 | return ctx->step; |
| 54 | } |
| 55 | |
| 56 | static struct resource *reg_script_get_resource(struct reg_script_context *ctx) |
| 57 | { |
Kyösti Mälkki | e3acc8f | 2019-09-13 10:49:20 +0300 | [diff] [blame] | 58 | #ifdef __SIMPLE_DEVICE__ |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 59 | return NULL; |
| 60 | #else |
| 61 | struct resource *res; |
| 62 | const struct reg_script *step = reg_script_get_step(ctx); |
| 63 | |
| 64 | res = ctx->res; |
| 65 | |
| 66 | if (res != NULL && res->index == step->res_index) |
| 67 | return res; |
| 68 | |
| 69 | res = find_resource(ctx->dev, step->res_index); |
| 70 | ctx->res = res; |
| 71 | return res; |
| 72 | #endif |
| 73 | } |
| 74 | |
| 75 | static uint32_t reg_script_read_pci(struct reg_script_context *ctx) |
| 76 | { |
| 77 | const struct reg_script *step = reg_script_get_step(ctx); |
| 78 | |
| 79 | switch (step->size) { |
| 80 | case REG_SCRIPT_SIZE_8: |
| 81 | return pci_read_config8(ctx->dev, step->reg); |
| 82 | case REG_SCRIPT_SIZE_16: |
| 83 | return pci_read_config16(ctx->dev, step->reg); |
| 84 | case REG_SCRIPT_SIZE_32: |
| 85 | return pci_read_config32(ctx->dev, step->reg); |
| 86 | } |
| 87 | return 0; |
| 88 | } |
| 89 | |
| 90 | static void reg_script_write_pci(struct reg_script_context *ctx) |
| 91 | { |
| 92 | const struct reg_script *step = reg_script_get_step(ctx); |
| 93 | |
| 94 | switch (step->size) { |
| 95 | case REG_SCRIPT_SIZE_8: |
| 96 | pci_write_config8(ctx->dev, step->reg, step->value); |
| 97 | break; |
| 98 | case REG_SCRIPT_SIZE_16: |
| 99 | pci_write_config16(ctx->dev, step->reg, step->value); |
| 100 | break; |
| 101 | case REG_SCRIPT_SIZE_32: |
| 102 | pci_write_config32(ctx->dev, step->reg, step->value); |
| 103 | break; |
| 104 | } |
| 105 | } |
| 106 | |
| 107 | static uint32_t reg_script_read_io(struct reg_script_context *ctx) |
| 108 | { |
| 109 | const struct reg_script *step = reg_script_get_step(ctx); |
| 110 | |
| 111 | switch (step->size) { |
| 112 | case REG_SCRIPT_SIZE_8: |
| 113 | return inb(step->reg); |
| 114 | case REG_SCRIPT_SIZE_16: |
| 115 | return inw(step->reg); |
| 116 | case REG_SCRIPT_SIZE_32: |
| 117 | return inl(step->reg); |
| 118 | } |
| 119 | return 0; |
| 120 | } |
| 121 | |
| 122 | static void reg_script_write_io(struct reg_script_context *ctx) |
| 123 | { |
| 124 | const struct reg_script *step = reg_script_get_step(ctx); |
| 125 | |
| 126 | switch (step->size) { |
| 127 | case REG_SCRIPT_SIZE_8: |
| 128 | outb(step->value, step->reg); |
| 129 | break; |
| 130 | case REG_SCRIPT_SIZE_16: |
| 131 | outw(step->value, step->reg); |
| 132 | break; |
| 133 | case REG_SCRIPT_SIZE_32: |
| 134 | outl(step->value, step->reg); |
| 135 | break; |
| 136 | } |
| 137 | } |
| 138 | |
| 139 | static uint32_t reg_script_read_mmio(struct reg_script_context *ctx) |
| 140 | { |
| 141 | const struct reg_script *step = reg_script_get_step(ctx); |
| 142 | |
| 143 | switch (step->size) { |
| 144 | case REG_SCRIPT_SIZE_8: |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 145 | return read8((u8 *)step->reg); |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 146 | case REG_SCRIPT_SIZE_16: |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 147 | return read16((u16 *)step->reg); |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 148 | case REG_SCRIPT_SIZE_32: |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 149 | return read32((u32 *)step->reg); |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 150 | } |
| 151 | return 0; |
| 152 | } |
| 153 | |
| 154 | static void reg_script_write_mmio(struct reg_script_context *ctx) |
| 155 | { |
| 156 | const struct reg_script *step = reg_script_get_step(ctx); |
| 157 | |
| 158 | switch (step->size) { |
| 159 | case REG_SCRIPT_SIZE_8: |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 160 | write8((u8 *)step->reg, step->value); |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 161 | break; |
| 162 | case REG_SCRIPT_SIZE_16: |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 163 | write16((u16 *)step->reg, step->value); |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 164 | break; |
| 165 | case REG_SCRIPT_SIZE_32: |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 166 | write32((u32 *)step->reg, step->value); |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 167 | break; |
| 168 | } |
| 169 | } |
| 170 | |
| 171 | static uint32_t reg_script_read_res(struct reg_script_context *ctx) |
| 172 | { |
| 173 | struct resource *res; |
| 174 | uint32_t val = 0; |
| 175 | const struct reg_script *step = reg_script_get_step(ctx); |
| 176 | |
| 177 | res = reg_script_get_resource(ctx); |
| 178 | |
| 179 | if (res == NULL) |
| 180 | return val; |
| 181 | |
| 182 | if (res->flags & IORESOURCE_IO) { |
| 183 | const struct reg_script io_step = { |
| 184 | .size = step->size, |
| 185 | .reg = res->base + step->reg, |
| 186 | }; |
| 187 | reg_script_set_step(ctx, &io_step); |
| 188 | val = reg_script_read_io(ctx); |
Lee Leahy | 342f8d6 | 2017-03-10 15:31:56 -0800 | [diff] [blame] | 189 | } else if (res->flags & IORESOURCE_MEM) { |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 190 | const struct reg_script mmio_step = { |
| 191 | .size = step->size, |
| 192 | .reg = res->base + step->reg, |
| 193 | }; |
| 194 | reg_script_set_step(ctx, &mmio_step); |
| 195 | val = reg_script_read_mmio(ctx); |
| 196 | } |
| 197 | reg_script_set_step(ctx, step); |
| 198 | return val; |
| 199 | } |
| 200 | |
| 201 | static void reg_script_write_res(struct reg_script_context *ctx) |
| 202 | { |
| 203 | struct resource *res; |
| 204 | const struct reg_script *step = reg_script_get_step(ctx); |
| 205 | |
| 206 | res = reg_script_get_resource(ctx); |
| 207 | |
| 208 | if (res == NULL) |
| 209 | return; |
| 210 | |
| 211 | if (res->flags & IORESOURCE_IO) { |
| 212 | const struct reg_script io_step = { |
| 213 | .size = step->size, |
| 214 | .reg = res->base + step->reg, |
| 215 | .value = step->value, |
| 216 | }; |
| 217 | reg_script_set_step(ctx, &io_step); |
| 218 | reg_script_write_io(ctx); |
Lee Leahy | 342f8d6 | 2017-03-10 15:31:56 -0800 | [diff] [blame] | 219 | } else if (res->flags & IORESOURCE_MEM) { |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 220 | const struct reg_script mmio_step = { |
| 221 | .size = step->size, |
| 222 | .reg = res->base + step->reg, |
| 223 | .value = step->value, |
| 224 | }; |
| 225 | reg_script_set_step(ctx, &mmio_step); |
| 226 | reg_script_write_mmio(ctx); |
| 227 | } |
| 228 | reg_script_set_step(ctx, step); |
| 229 | } |
| 230 | |
Werner Zeh | 9d02153 | 2016-02-19 10:02:49 +0100 | [diff] [blame] | 231 | #if HAS_IOSF |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 232 | static uint32_t reg_script_read_iosf(struct reg_script_context *ctx) |
| 233 | { |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 234 | const struct reg_script *step = reg_script_get_step(ctx); |
| 235 | |
| 236 | switch (step->id) { |
Aaron Durbin | bc5b557 | 2013-12-11 17:13:10 -0800 | [diff] [blame] | 237 | case IOSF_PORT_AUNIT: |
| 238 | return iosf_aunit_read(step->reg); |
| 239 | case IOSF_PORT_CPU_BUS: |
| 240 | return iosf_cpu_bus_read(step->reg); |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 241 | case IOSF_PORT_BUNIT: |
| 242 | return iosf_bunit_read(step->reg); |
| 243 | case IOSF_PORT_DUNIT_CH0: |
| 244 | return iosf_dunit_ch0_read(step->reg); |
| 245 | case IOSF_PORT_PMC: |
| 246 | return iosf_punit_read(step->reg); |
| 247 | case IOSF_PORT_USBPHY: |
| 248 | return iosf_usbphy_read(step->reg); |
Aaron Durbin | bc5b557 | 2013-12-11 17:13:10 -0800 | [diff] [blame] | 249 | case IOSF_PORT_SEC: |
| 250 | return iosf_sec_read(step->reg); |
| 251 | case IOSF_PORT_0x45: |
| 252 | return iosf_port45_read(step->reg); |
| 253 | case IOSF_PORT_0x46: |
| 254 | return iosf_port46_read(step->reg); |
| 255 | case IOSF_PORT_0x47: |
| 256 | return iosf_port47_read(step->reg); |
Aaron Durbin | e8f97d4 | 2013-11-12 16:38:54 -0600 | [diff] [blame] | 257 | case IOSF_PORT_SCORE: |
| 258 | return iosf_score_read(step->reg); |
Aaron Durbin | bc5b557 | 2013-12-11 17:13:10 -0800 | [diff] [blame] | 259 | case IOSF_PORT_0x55: |
| 260 | return iosf_port55_read(step->reg); |
| 261 | case IOSF_PORT_0x58: |
| 262 | return iosf_port58_read(step->reg); |
| 263 | case IOSF_PORT_0x59: |
| 264 | return iosf_port59_read(step->reg); |
| 265 | case IOSF_PORT_0x5a: |
| 266 | return iosf_port5a_read(step->reg); |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 267 | case IOSF_PORT_USHPHY: |
| 268 | return iosf_ushphy_read(step->reg); |
Aaron Durbin | e8f97d4 | 2013-11-12 16:38:54 -0600 | [diff] [blame] | 269 | case IOSF_PORT_SCC: |
| 270 | return iosf_scc_read(step->reg); |
Aaron Durbin | 64b902b | 2013-11-12 20:20:10 -0600 | [diff] [blame] | 271 | case IOSF_PORT_LPSS: |
| 272 | return iosf_lpss_read(step->reg); |
Aaron Durbin | bc5b557 | 2013-12-11 17:13:10 -0800 | [diff] [blame] | 273 | case IOSF_PORT_0xa2: |
| 274 | return iosf_porta2_read(step->reg); |
Aaron Durbin | e8f97d4 | 2013-11-12 16:38:54 -0600 | [diff] [blame] | 275 | case IOSF_PORT_CCU: |
| 276 | return iosf_ccu_read(step->reg); |
Aaron Durbin | bc5b557 | 2013-12-11 17:13:10 -0800 | [diff] [blame] | 277 | case IOSF_PORT_SSUS: |
| 278 | return iosf_ssus_read(step->reg); |
| 279 | default: |
| 280 | printk(BIOS_DEBUG, "No read support for IOSF port 0x%x.\n", |
| 281 | step->id); |
| 282 | break; |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 283 | } |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 284 | return 0; |
| 285 | } |
| 286 | |
| 287 | static void reg_script_write_iosf(struct reg_script_context *ctx) |
| 288 | { |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 289 | const struct reg_script *step = reg_script_get_step(ctx); |
| 290 | |
| 291 | switch (step->id) { |
Aaron Durbin | bc5b557 | 2013-12-11 17:13:10 -0800 | [diff] [blame] | 292 | case IOSF_PORT_AUNIT: |
| 293 | iosf_aunit_write(step->reg, step->value); |
| 294 | break; |
| 295 | case IOSF_PORT_CPU_BUS: |
| 296 | iosf_cpu_bus_write(step->reg, step->value); |
| 297 | break; |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 298 | case IOSF_PORT_BUNIT: |
| 299 | iosf_bunit_write(step->reg, step->value); |
| 300 | break; |
| 301 | case IOSF_PORT_DUNIT_CH0: |
| 302 | iosf_dunit_write(step->reg, step->value); |
| 303 | break; |
| 304 | case IOSF_PORT_PMC: |
| 305 | iosf_punit_write(step->reg, step->value); |
| 306 | break; |
| 307 | case IOSF_PORT_USBPHY: |
| 308 | iosf_usbphy_write(step->reg, step->value); |
| 309 | break; |
Aaron Durbin | bc5b557 | 2013-12-11 17:13:10 -0800 | [diff] [blame] | 310 | case IOSF_PORT_SEC: |
| 311 | iosf_sec_write(step->reg, step->value); |
| 312 | break; |
| 313 | case IOSF_PORT_0x45: |
| 314 | iosf_port45_write(step->reg, step->value); |
| 315 | break; |
| 316 | case IOSF_PORT_0x46: |
| 317 | iosf_port46_write(step->reg, step->value); |
| 318 | break; |
| 319 | case IOSF_PORT_0x47: |
| 320 | iosf_port47_write(step->reg, step->value); |
| 321 | break; |
Aaron Durbin | e8f97d4 | 2013-11-12 16:38:54 -0600 | [diff] [blame] | 322 | case IOSF_PORT_SCORE: |
| 323 | iosf_score_write(step->reg, step->value); |
| 324 | break; |
Aaron Durbin | bc5b557 | 2013-12-11 17:13:10 -0800 | [diff] [blame] | 325 | case IOSF_PORT_0x55: |
| 326 | iosf_port55_write(step->reg, step->value); |
| 327 | break; |
| 328 | case IOSF_PORT_0x58: |
| 329 | iosf_port58_write(step->reg, step->value); |
| 330 | break; |
| 331 | case IOSF_PORT_0x59: |
| 332 | iosf_port59_write(step->reg, step->value); |
| 333 | break; |
| 334 | case IOSF_PORT_0x5a: |
| 335 | iosf_port5a_write(step->reg, step->value); |
| 336 | break; |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 337 | case IOSF_PORT_USHPHY: |
| 338 | iosf_ushphy_write(step->reg, step->value); |
| 339 | break; |
Aaron Durbin | e8f97d4 | 2013-11-12 16:38:54 -0600 | [diff] [blame] | 340 | case IOSF_PORT_SCC: |
| 341 | iosf_scc_write(step->reg, step->value); |
| 342 | break; |
Aaron Durbin | 64b902b | 2013-11-12 20:20:10 -0600 | [diff] [blame] | 343 | case IOSF_PORT_LPSS: |
| 344 | iosf_lpss_write(step->reg, step->value); |
| 345 | break; |
Aaron Durbin | bc5b557 | 2013-12-11 17:13:10 -0800 | [diff] [blame] | 346 | case IOSF_PORT_0xa2: |
| 347 | iosf_porta2_write(step->reg, step->value); |
| 348 | break; |
Aaron Durbin | e8f97d4 | 2013-11-12 16:38:54 -0600 | [diff] [blame] | 349 | case IOSF_PORT_CCU: |
| 350 | iosf_ccu_write(step->reg, step->value); |
| 351 | break; |
Aaron Durbin | bc5b557 | 2013-12-11 17:13:10 -0800 | [diff] [blame] | 352 | case IOSF_PORT_SSUS: |
| 353 | iosf_ssus_write(step->reg, step->value); |
| 354 | break; |
| 355 | default: |
| 356 | printk(BIOS_DEBUG, "No write support for IOSF port 0x%x.\n", |
| 357 | step->id); |
| 358 | break; |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 359 | } |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 360 | } |
Werner Zeh | 9d02153 | 2016-02-19 10:02:49 +0100 | [diff] [blame] | 361 | #endif /* HAS_IOSF */ |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 362 | |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 363 | |
Duncan Laurie | fd461e3 | 2013-11-08 23:00:24 -0800 | [diff] [blame] | 364 | static uint64_t reg_script_read_msr(struct reg_script_context *ctx) |
| 365 | { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 366 | #if CONFIG(ARCH_X86) |
Duncan Laurie | fd461e3 | 2013-11-08 23:00:24 -0800 | [diff] [blame] | 367 | const struct reg_script *step = reg_script_get_step(ctx); |
| 368 | msr_t msr = rdmsr(step->reg); |
| 369 | uint64_t value = msr.hi; |
Duncan Laurie | fd461e3 | 2013-11-08 23:00:24 -0800 | [diff] [blame] | 370 | value <<= 32; |
| 371 | value |= msr.lo; |
| 372 | return value; |
| 373 | #endif |
| 374 | } |
| 375 | |
| 376 | static void reg_script_write_msr(struct reg_script_context *ctx) |
| 377 | { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 378 | #if CONFIG(ARCH_X86) |
Duncan Laurie | fd461e3 | 2013-11-08 23:00:24 -0800 | [diff] [blame] | 379 | const struct reg_script *step = reg_script_get_step(ctx); |
| 380 | msr_t msr; |
| 381 | msr.hi = step->value >> 32; |
| 382 | msr.lo = step->value & 0xffffffff; |
| 383 | wrmsr(step->reg, msr); |
| 384 | #endif |
| 385 | } |
| 386 | |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 387 | /* Locate the structure containing the platform specific bus access routines */ |
| 388 | static const struct reg_script_bus_entry |
| 389 | *find_bus(const struct reg_script *step) |
| 390 | { |
Lee Leahy | efcee9f | 2016-04-29 17:26:36 -0700 | [diff] [blame] | 391 | extern const struct reg_script_bus_entry *_rsbe_init_begin[]; |
| 392 | extern const struct reg_script_bus_entry *_ersbe_init_begin[]; |
Lee Leahy | b2d834a | 2017-03-08 16:52:22 -0800 | [diff] [blame] | 393 | const struct reg_script_bus_entry * const *bus; |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 394 | size_t table_entries; |
| 395 | size_t i; |
| 396 | |
| 397 | /* Locate the platform specific bus */ |
Lee Leahy | efcee9f | 2016-04-29 17:26:36 -0700 | [diff] [blame] | 398 | bus = _rsbe_init_begin; |
| 399 | table_entries = &_ersbe_init_begin[0] - &_rsbe_init_begin[0]; |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 400 | for (i = 0; i < table_entries; i++) { |
Lee Leahy | efcee9f | 2016-04-29 17:26:36 -0700 | [diff] [blame] | 401 | if (bus[i]->type == step->type) |
| 402 | return bus[i]; |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 403 | } |
| 404 | |
| 405 | /* Bus not found */ |
| 406 | return NULL; |
| 407 | } |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 408 | |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 409 | static void reg_script_display(struct reg_script_context *ctx, |
| 410 | const struct reg_script *step, const char *arrow, uint64_t value) |
| 411 | { |
| 412 | /* Display the register address and data */ |
| 413 | if (ctx->display_prefix != NULL) |
| 414 | printk(BIOS_INFO, "%s: ", ctx->display_prefix); |
| 415 | if (ctx->display_features & REG_SCRIPT_DISPLAY_REGISTER) |
| 416 | printk(BIOS_INFO, "0x%08x %s ", step->reg, arrow); |
| 417 | if (ctx->display_features & REG_SCRIPT_DISPLAY_VALUE) |
| 418 | switch (step->size) { |
| 419 | case REG_SCRIPT_SIZE_8: |
| 420 | printk(BIOS_INFO, "0x%02x\n", (uint8_t)value); |
| 421 | break; |
| 422 | case REG_SCRIPT_SIZE_16: |
| 423 | printk(BIOS_INFO, "0x%04x\n", (int16_t)value); |
| 424 | break; |
| 425 | case REG_SCRIPT_SIZE_32: |
| 426 | printk(BIOS_INFO, "0x%08x\n", (uint32_t)value); |
| 427 | break; |
| 428 | default: |
| 429 | printk(BIOS_INFO, "0x%016llx\n", value); |
| 430 | break; |
| 431 | } |
| 432 | } |
| 433 | |
Duncan Laurie | fd461e3 | 2013-11-08 23:00:24 -0800 | [diff] [blame] | 434 | static uint64_t reg_script_read(struct reg_script_context *ctx) |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 435 | { |
| 436 | const struct reg_script *step = reg_script_get_step(ctx); |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 437 | uint64_t value = 0; |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 438 | |
| 439 | switch (step->type) { |
| 440 | case REG_SCRIPT_TYPE_PCI: |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 441 | ctx->display_prefix = "PCI"; |
| 442 | value = reg_script_read_pci(ctx); |
| 443 | break; |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 444 | case REG_SCRIPT_TYPE_IO: |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 445 | ctx->display_prefix = "IO"; |
| 446 | value = reg_script_read_io(ctx); |
| 447 | break; |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 448 | case REG_SCRIPT_TYPE_MMIO: |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 449 | ctx->display_prefix = "MMIO"; |
| 450 | value = reg_script_read_mmio(ctx); |
| 451 | break; |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 452 | case REG_SCRIPT_TYPE_RES: |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 453 | ctx->display_prefix = "RES"; |
| 454 | value = reg_script_read_res(ctx); |
| 455 | break; |
Duncan Laurie | fd461e3 | 2013-11-08 23:00:24 -0800 | [diff] [blame] | 456 | case REG_SCRIPT_TYPE_MSR: |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 457 | ctx->display_prefix = "MSR"; |
| 458 | value = reg_script_read_msr(ctx); |
| 459 | break; |
Werner Zeh | 9d02153 | 2016-02-19 10:02:49 +0100 | [diff] [blame] | 460 | #if HAS_IOSF |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 461 | case REG_SCRIPT_TYPE_IOSF: |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 462 | ctx->display_prefix = "IOSF"; |
| 463 | value = reg_script_read_iosf(ctx); |
| 464 | break; |
Werner Zeh | 9d02153 | 2016-02-19 10:02:49 +0100 | [diff] [blame] | 465 | #endif /* HAS_IOSF */ |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 466 | default: |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 467 | { |
| 468 | const struct reg_script_bus_entry *bus; |
| 469 | |
| 470 | /* Read from the platform specific bus */ |
| 471 | bus = find_bus(step); |
Lee Leahy | 36984d8 | 2017-03-10 17:56:44 -0800 | [diff] [blame] | 472 | if (bus != NULL) { |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 473 | value = bus->reg_script_read(ctx); |
| 474 | break; |
Stefan Reinauer | f7dd6d5 | 2016-05-04 17:52:56 -0700 | [diff] [blame] | 475 | } |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 476 | } |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 477 | printk(BIOS_ERR, |
| 478 | "Unsupported read type (0x%x) for this device!\n", |
| 479 | step->type); |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 480 | return 0; |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 481 | } |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 482 | |
| 483 | /* Display the register address and data */ |
| 484 | if (ctx->display_features) |
| 485 | reg_script_display(ctx, step, "-->", value); |
| 486 | return value; |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 487 | } |
| 488 | |
| 489 | static void reg_script_write(struct reg_script_context *ctx) |
| 490 | { |
| 491 | const struct reg_script *step = reg_script_get_step(ctx); |
| 492 | |
| 493 | switch (step->type) { |
| 494 | case REG_SCRIPT_TYPE_PCI: |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 495 | ctx->display_prefix = "PCI"; |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 496 | reg_script_write_pci(ctx); |
| 497 | break; |
| 498 | case REG_SCRIPT_TYPE_IO: |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 499 | ctx->display_prefix = "IO"; |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 500 | reg_script_write_io(ctx); |
| 501 | break; |
| 502 | case REG_SCRIPT_TYPE_MMIO: |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 503 | ctx->display_prefix = "MMIO"; |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 504 | reg_script_write_mmio(ctx); |
| 505 | break; |
| 506 | case REG_SCRIPT_TYPE_RES: |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 507 | ctx->display_prefix = "RES"; |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 508 | reg_script_write_res(ctx); |
| 509 | break; |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 510 | case REG_SCRIPT_TYPE_MSR: |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 511 | ctx->display_prefix = "MSR"; |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 512 | reg_script_write_msr(ctx); |
| 513 | break; |
Werner Zeh | 9d02153 | 2016-02-19 10:02:49 +0100 | [diff] [blame] | 514 | #if HAS_IOSF |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 515 | case REG_SCRIPT_TYPE_IOSF: |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 516 | ctx->display_prefix = "IOSF"; |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 517 | reg_script_write_iosf(ctx); |
| 518 | break; |
Werner Zeh | 9d02153 | 2016-02-19 10:02:49 +0100 | [diff] [blame] | 519 | #endif /* HAS_IOSF */ |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 520 | default: |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 521 | { |
| 522 | const struct reg_script_bus_entry *bus; |
| 523 | |
| 524 | /* Write to the platform specific bus */ |
| 525 | bus = find_bus(step); |
Lee Leahy | 36984d8 | 2017-03-10 17:56:44 -0800 | [diff] [blame] | 526 | if (bus != NULL) { |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 527 | bus->reg_script_write(ctx); |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 528 | break; |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 529 | } |
| 530 | } |
Lee Leahy | 9f5a5c5 | 2014-08-29 13:38:59 -0700 | [diff] [blame] | 531 | printk(BIOS_ERR, |
| 532 | "Unsupported write type (0x%x) for this device!\n", |
| 533 | step->type); |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 534 | return; |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 535 | } |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 536 | |
| 537 | /* Display the register address and data */ |
| 538 | if (ctx->display_features) |
| 539 | reg_script_display(ctx, step, "<--", step->value); |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 540 | } |
| 541 | |
| 542 | static void reg_script_rmw(struct reg_script_context *ctx) |
| 543 | { |
Duncan Laurie | fd461e3 | 2013-11-08 23:00:24 -0800 | [diff] [blame] | 544 | uint64_t value; |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 545 | const struct reg_script *step = reg_script_get_step(ctx); |
| 546 | struct reg_script write_step = *step; |
| 547 | |
| 548 | value = reg_script_read(ctx); |
| 549 | value &= step->mask; |
| 550 | value |= step->value; |
| 551 | write_step.value = value; |
| 552 | reg_script_set_step(ctx, &write_step); |
| 553 | reg_script_write(ctx); |
| 554 | reg_script_set_step(ctx, step); |
| 555 | } |
| 556 | |
Lee Leahy | 6bcbe57 | 2016-04-23 07:58:27 -0700 | [diff] [blame] | 557 | static void reg_script_rxw(struct reg_script_context *ctx) |
| 558 | { |
| 559 | uint64_t value; |
| 560 | const struct reg_script *step = reg_script_get_step(ctx); |
| 561 | struct reg_script write_step = *step; |
| 562 | |
| 563 | /* |
| 564 | * XOR logic table |
| 565 | * Input XOR Value |
| 566 | * 0 0 0 |
| 567 | * 0 1 1 |
| 568 | * 1 0 1 |
| 569 | * 1 1 0 |
| 570 | * |
| 571 | * Supported operations |
| 572 | * |
| 573 | * Input Mask Temp XOR Value Operation |
| 574 | * 0 0 0 0 0 Clear bit |
| 575 | * 1 0 0 0 0 |
| 576 | * 0 0 0 1 1 Set bit |
| 577 | * 1 0 0 1 1 |
| 578 | * 0 1 0 0 0 Preserve bit |
| 579 | * 1 1 1 0 1 |
| 580 | * 0 1 0 1 1 Toggle bit |
| 581 | * 1 1 1 1 0 |
| 582 | */ |
| 583 | value = reg_script_read(ctx); |
| 584 | value &= step->mask; |
| 585 | value ^= step->value; |
| 586 | write_step.value = value; |
| 587 | reg_script_set_step(ctx, &write_step); |
| 588 | reg_script_write(ctx); |
| 589 | reg_script_set_step(ctx, step); |
| 590 | } |
| 591 | |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 592 | /* In order to easily chain scripts together handle the REG_SCRIPT_COMMAND_NEXT |
| 593 | * as recursive call with a new context that has the same dev and resource |
| 594 | * as the previous one. That will run to completion and then move on to the |
| 595 | * next step of the previous context. */ |
| 596 | static void reg_script_run_next(struct reg_script_context *ctx, |
Lee Leahy | e20a319 | 2017-03-09 16:21:34 -0800 | [diff] [blame] | 597 | const struct reg_script *step); |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 598 | |
Duncan Laurie | fd461e3 | 2013-11-08 23:00:24 -0800 | [diff] [blame] | 599 | |
| 600 | static void reg_script_run_step(struct reg_script_context *ctx, |
| 601 | const struct reg_script *step) |
| 602 | { |
| 603 | uint64_t value = 0, try; |
| 604 | |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 605 | ctx->display_features = ctx->display_state; |
| 606 | ctx->display_prefix = NULL; |
Duncan Laurie | fd461e3 | 2013-11-08 23:00:24 -0800 | [diff] [blame] | 607 | switch (step->command) { |
| 608 | case REG_SCRIPT_COMMAND_READ: |
| 609 | (void)reg_script_read(ctx); |
| 610 | break; |
| 611 | case REG_SCRIPT_COMMAND_WRITE: |
| 612 | reg_script_write(ctx); |
| 613 | break; |
| 614 | case REG_SCRIPT_COMMAND_RMW: |
| 615 | reg_script_rmw(ctx); |
| 616 | break; |
Lee Leahy | 6bcbe57 | 2016-04-23 07:58:27 -0700 | [diff] [blame] | 617 | case REG_SCRIPT_COMMAND_RXW: |
| 618 | reg_script_rxw(ctx); |
| 619 | break; |
Duncan Laurie | fd461e3 | 2013-11-08 23:00:24 -0800 | [diff] [blame] | 620 | case REG_SCRIPT_COMMAND_POLL: |
| 621 | for (try = 0; try < step->timeout; try += POLL_DELAY) { |
| 622 | value = reg_script_read(ctx) & step->mask; |
| 623 | if (value == step->value) |
| 624 | break; |
| 625 | udelay(POLL_DELAY); |
| 626 | } |
| 627 | if (try >= step->timeout) |
| 628 | printk(BIOS_WARNING, "%s: POLL timeout waiting for " |
| 629 | "0x%x to be 0x%lx, got 0x%lx\n", __func__, |
| 630 | step->reg, (unsigned long)step->value, |
| 631 | (unsigned long)value); |
| 632 | break; |
| 633 | case REG_SCRIPT_COMMAND_SET_DEV: |
| 634 | reg_script_set_dev(ctx, step->dev); |
| 635 | break; |
| 636 | case REG_SCRIPT_COMMAND_NEXT: |
| 637 | reg_script_run_next(ctx, step->next); |
| 638 | break; |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 639 | case REG_SCRIPT_COMMAND_DISPLAY: |
| 640 | ctx->display_state = step->value; |
| 641 | break; |
| 642 | |
Duncan Laurie | fd461e3 | 2013-11-08 23:00:24 -0800 | [diff] [blame] | 643 | default: |
| 644 | printk(BIOS_WARNING, "Invalid command: %08x\n", |
| 645 | step->command); |
| 646 | break; |
| 647 | } |
| 648 | } |
| 649 | |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 650 | static void reg_script_run_with_context(struct reg_script_context *ctx) |
| 651 | { |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 652 | while (1) { |
| 653 | const struct reg_script *step = reg_script_get_step(ctx); |
| 654 | |
| 655 | if (step->command == REG_SCRIPT_COMMAND_END) |
| 656 | break; |
| 657 | |
Duncan Laurie | fd461e3 | 2013-11-08 23:00:24 -0800 | [diff] [blame] | 658 | reg_script_run_step(ctx, step); |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 659 | reg_script_set_step(ctx, step + 1); |
| 660 | } |
| 661 | } |
| 662 | |
| 663 | static void reg_script_run_next(struct reg_script_context *prev_ctx, |
Lee Leahy | e20a319 | 2017-03-09 16:21:34 -0800 | [diff] [blame] | 664 | const struct reg_script *step) |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 665 | { |
| 666 | struct reg_script_context ctx; |
| 667 | |
| 668 | /* Use prev context as a basis but start at a new step. */ |
| 669 | ctx = *prev_ctx; |
| 670 | reg_script_set_step(&ctx, step); |
| 671 | reg_script_run_with_context(&ctx); |
| 672 | } |
| 673 | |
Elyes HAOUAS | f9e47cc | 2018-12-05 11:03:36 +0100 | [diff] [blame] | 674 | #ifdef __SIMPLE_DEVICE__ |
| 675 | void reg_script_run_on_dev(pci_devfn_t dev, const struct reg_script *step) |
| 676 | #else |
| 677 | void reg_script_run_on_dev(struct device *dev, const struct reg_script *step) |
| 678 | #endif |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 679 | { |
| 680 | struct reg_script_context ctx; |
| 681 | |
Lee Leahy | 564dc9c | 2016-04-29 15:07:19 -0700 | [diff] [blame] | 682 | ctx.display_state = REG_SCRIPT_DISPLAY_NOTHING; |
Aaron Durbin | d86f0b7 | 2013-12-10 17:09:40 -0800 | [diff] [blame] | 683 | reg_script_set_dev(&ctx, dev); |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 684 | reg_script_set_step(&ctx, step); |
| 685 | reg_script_run_with_context(&ctx); |
| 686 | } |
Aaron Durbin | d86f0b7 | 2013-12-10 17:09:40 -0800 | [diff] [blame] | 687 | |
| 688 | void reg_script_run(const struct reg_script *step) |
| 689 | { |
| 690 | reg_script_run_on_dev(EMPTY_DEV, step); |
| 691 | } |