| Keith Hui | ec42c2e | 2010-03-05 16:31:41 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 19 | */ |
| 20 | |
| 21 | #define ASSEMBLY 1 |
| 22 | #define __PRE_RAM__ |
| 23 | |
| 24 | #include <stdint.h> |
| 25 | #include <device/pci_def.h> |
| 26 | #include <arch/io.h> |
| 27 | #include <device/pnp_def.h> |
| 28 | #include <arch/romcc_io.h> |
| 29 | #include <arch/hlt.h> |
| 30 | #include <stdlib.h> |
| 31 | #include "pc80/serial.c" |
| 32 | #include "arch/i386/lib/console.c" |
| 33 | #include "lib/ramtest.c" |
| 34 | #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" |
| 35 | #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" |
| 36 | #include "northbridge/intel/i440bx/raminit.h" |
| 37 | #include "lib/debug.c" |
| 38 | #include "pc80/udelay_io.c" |
| 39 | #include "lib/delay.c" |
| 40 | #include "cpu/x86/mtrr/earlymtrr.c" |
| 41 | #include "cpu/x86/bist.h" |
| 42 | /* FIXME: The ASUS P2B-LS has a Winbond W83977EF, actually. */ |
| 43 | #include "superio/winbond/w83977tf/w83977tf_early_serial.c" |
| 44 | |
| 45 | #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) |
| 46 | |
| 47 | static inline int spd_read_byte(unsigned int device, unsigned int address) |
| 48 | { |
| 49 | return smbus_read_byte(device, address); |
| 50 | } |
| 51 | |
| 52 | #include "northbridge/intel/i440bx/raminit.c" |
| 53 | #include "northbridge/intel/i440bx/debug.c" |
| 54 | |
| 55 | static void main(unsigned long bist) |
| 56 | { |
| 57 | if (bist == 0) |
| 58 | early_mtrr_init(); |
| 59 | |
| 60 | /* FIXME: The ASUS P2B-LS has a Winbond W83977EF, actually. */ |
| 61 | w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
| 62 | uart_init(); |
| 63 | console_init(); |
| 64 | report_bist_failure(bist); |
| 65 | |
| 66 | /* Enable access to the full ROM chip, needed very early by CBFS. */ |
| 67 | i82371eb_enable_rom(PCI_DEV(0, 4, 0)); /* ISA bridge at 00:04.0. */ |
| 68 | |
| 69 | enable_smbus(); |
| 70 | /* dump_spd_registers(); */ |
| 71 | sdram_set_registers(); |
| 72 | sdram_set_spd_registers(); |
| 73 | sdram_enable(); |
| 74 | /* ram_check(0, 640 * 1024); */ |
| 75 | } |