Patrick Rudolph | fa47042 | 2017-06-20 17:49:53 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2017 Patrick Rudolph <siro@das-labor.org> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
| 8 | * published by the Free Software Foundation; version 2, or (at your option) |
| 9 | * any later verion of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | */ |
| 16 | |
| 17 | #include <device/device.h> |
| 18 | #include <device/pci.h> |
| 19 | #include <device/pci_ids.h> |
| 20 | #include <device/pci_ops.h> |
Patrick Rudolph | bac2303 | 2017-06-30 15:18:23 +0200 | [diff] [blame] | 21 | #include <console/console.h> |
| 22 | #include <cbmem.h> |
Patrick Rudolph | fa47042 | 2017-06-20 17:49:53 +0200 | [diff] [blame] | 23 | #include "opregion.h" |
| 24 | |
| 25 | /* Write ASLS PCI register and prepare SWSCI register. */ |
| 26 | void intel_gma_opregion_register(uintptr_t opregion) |
| 27 | { |
| 28 | device_t igd; |
| 29 | u16 reg16; |
| 30 | |
| 31 | igd = dev_find_slot(0, PCI_DEVFN(0x2, 0)); |
| 32 | if (!igd || !igd->enabled) |
| 33 | return; |
| 34 | |
| 35 | /* |
| 36 | * Intel BIOS Specification |
| 37 | * Chapter 5.3.7 "Initialize Hardware State" |
| 38 | */ |
| 39 | pci_write_config32(igd, ASLS, opregion); |
| 40 | |
| 41 | /* |
| 42 | * Intel's Windows driver relies on this: |
| 43 | * Intel BIOS Specification |
| 44 | * Chapter 5.4 "ASL Software SCI Handler" |
| 45 | */ |
| 46 | reg16 = pci_read_config16(igd, SWSCI); |
| 47 | reg16 &= ~GSSCIE; |
| 48 | reg16 |= SMISCISEL; |
| 49 | pci_write_config16(igd, SWSCI, reg16); |
| 50 | } |
Patrick Rudolph | bac2303 | 2017-06-30 15:18:23 +0200 | [diff] [blame] | 51 | |
| 52 | /* Restore ASLS register on S3 resume and prepare SWSCI. */ |
| 53 | void intel_gma_restore_opregion(void) |
| 54 | { |
| 55 | if (acpi_is_wakeup_s3()) { |
| 56 | const void *const gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); |
| 57 | uintptr_t aslb; |
| 58 | |
| 59 | if (gnvs && (aslb = gma_get_gnvs_aslb(gnvs))) |
| 60 | intel_gma_opregion_register(aslb); |
| 61 | else |
| 62 | printk(BIOS_ERR, "Error: GNVS or ASLB not set.\n"); |
| 63 | } |
| 64 | } |