| Ravi Sarawadi | ebb2d3c | 2019-12-19 23:01:48 -0800 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2019 Intel Corporation. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <fsp/api.h> |
| 17 | #include <soc/romstage.h> |
| 18 | |
| 19 | void mainboard_memory_init_params(FSPM_UPD *mupd) |
| 20 | { |
| 21 | /* ToDo : Fill FSP-M memory params */ |
| 22 | } |