Gitiles
Code Review Sign In
review.coreboot.org / coreboot / eba1d555dae25059e787b0d073b00de87cdcf987 / . / util / inteltool / rootcmplx.c
blob: b1e4939def4e403103db6cd7acdd88643e3f39fc [file] [log] [blame]
Patrick Georgiea063cb2020-05-08 19:28:13 +0200[diff] [blame]1/* inteltool - dump all registers on an Intel CPU + chipset based system */
Patrick Georgi7333a112020-05-08 20:48:04 +0200[diff] [blame]2/* SPDX-License-Identifier: GPL-2.0-only */
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]3
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]4#include <stdio.h>
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]5#include <stdlib.h>
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]6#include "inteltool.h"
7
8int print_rcba(struct pci_dev *sb)
9{
10 int i, size = 0x4000;
11 volatile uint8_t *rcba;
12 uint32_t rcba_phys;
13
14 printf("\n============= RCBA ==============\n\n");
15
16 switch (sb->device_id) {
Pat Erleyca3548e2010-04-21 06:23:19 +0000[diff] [blame]17 case PCI_DEVICE_ID_INTEL_ICH6:
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]18 case PCI_DEVICE_ID_INTEL_ICH7:
19 case PCI_DEVICE_ID_INTEL_ICH7M:
20 case PCI_DEVICE_ID_INTEL_ICH7DH:
21 case PCI_DEVICE_ID_INTEL_ICH7MDH:
Warren Turkalf3d3ced2010-09-03 09:33:50 +0000[diff] [blame]22 case PCI_DEVICE_ID_INTEL_ICH8:
23 case PCI_DEVICE_ID_INTEL_ICH8M:
Lubomir Rintel2a13bad2015-03-01 10:14:15 +0100[diff] [blame]24 case PCI_DEVICE_ID_INTEL_ICH8ME:
Anton Kochkovda0b4562010-05-30 12:33:12 +0000[diff] [blame]25 case PCI_DEVICE_ID_INTEL_ICH9DH:
26 case PCI_DEVICE_ID_INTEL_ICH9DO:
27 case PCI_DEVICE_ID_INTEL_ICH9R:
28 case PCI_DEVICE_ID_INTEL_ICH9:
29 case PCI_DEVICE_ID_INTEL_ICH9M:
30 case PCI_DEVICE_ID_INTEL_ICH9ME:
Arthur Heymans026f7df2017-04-10 22:26:13 +0200[diff] [blame]31 case PCI_DEVICE_ID_INTEL_ICH10:
Idwer Vollering66dcda92020-07-09 14:16:39 +0200[diff] [blame]32 case PCI_DEVICE_ID_INTEL_ICH10DO:
Warren Turkalf3d3ced2010-09-03 09:33:50 +0000[diff] [blame]33 case PCI_DEVICE_ID_INTEL_ICH10R:
Corey Osgoodf366ce02010-08-17 08:33:44 +0000[diff] [blame]34 case PCI_DEVICE_ID_INTEL_NM10:
Sven Schnelle54a5aed2011-10-30 13:30:36 +0100[diff] [blame]35 case PCI_DEVICE_ID_INTEL_I63XX:
Stefan Tauner088f5692013-05-28 11:30:25 +0200[diff] [blame]36 case PCI_DEVICE_ID_INTEL_3400:
37 case PCI_DEVICE_ID_INTEL_3420:
38 case PCI_DEVICE_ID_INTEL_3450:
Stefan Taunerb75a39a2014-11-01 17:12:37 +0100[diff] [blame]39 case PCI_DEVICE_ID_INTEL_3400_DESKTOP:
40 case PCI_DEVICE_ID_INTEL_3400_MOBILE:
41 case PCI_DEVICE_ID_INTEL_3400_MOBILE_SFF:
42 case PCI_DEVICE_ID_INTEL_B55_A:
Stefan Tauner088f5692013-05-28 11:30:25 +0200[diff] [blame]43 case PCI_DEVICE_ID_INTEL_B55_B:
Stefan Taunerb75a39a2014-11-01 17:12:37 +0100[diff] [blame]44 case PCI_DEVICE_ID_INTEL_H55:
45 case PCI_DEVICE_ID_INTEL_H57:
46 case PCI_DEVICE_ID_INTEL_HM55:
47 case PCI_DEVICE_ID_INTEL_HM57:
48 case PCI_DEVICE_ID_INTEL_P55:
49 case PCI_DEVICE_ID_INTEL_PM55:
50 case PCI_DEVICE_ID_INTEL_Q57:
51 case PCI_DEVICE_ID_INTEL_QM57:
52 case PCI_DEVICE_ID_INTEL_QS57:
Nico Huber14290b32013-03-29 19:08:39 +0100[diff] [blame]53 case PCI_DEVICE_ID_INTEL_Z68:
54 case PCI_DEVICE_ID_INTEL_P67:
55 case PCI_DEVICE_ID_INTEL_UM67:
56 case PCI_DEVICE_ID_INTEL_HM65:
57 case PCI_DEVICE_ID_INTEL_H67:
58 case PCI_DEVICE_ID_INTEL_HM67:
59 case PCI_DEVICE_ID_INTEL_Q65:
60 case PCI_DEVICE_ID_INTEL_QS67:
61 case PCI_DEVICE_ID_INTEL_Q67:
62 case PCI_DEVICE_ID_INTEL_QM67:
63 case PCI_DEVICE_ID_INTEL_B65:
64 case PCI_DEVICE_ID_INTEL_C202:
65 case PCI_DEVICE_ID_INTEL_C204:
66 case PCI_DEVICE_ID_INTEL_C206:
67 case PCI_DEVICE_ID_INTEL_H61:
68 case PCI_DEVICE_ID_INTEL_Z77:
69 case PCI_DEVICE_ID_INTEL_Z75:
70 case PCI_DEVICE_ID_INTEL_Q77:
71 case PCI_DEVICE_ID_INTEL_Q75:
72 case PCI_DEVICE_ID_INTEL_B75:
73 case PCI_DEVICE_ID_INTEL_H77:
74 case PCI_DEVICE_ID_INTEL_C216:
75 case PCI_DEVICE_ID_INTEL_QM77:
76 case PCI_DEVICE_ID_INTEL_QS77:
77 case PCI_DEVICE_ID_INTEL_HM77:
78 case PCI_DEVICE_ID_INTEL_UM77:
79 case PCI_DEVICE_ID_INTEL_HM76:
80 case PCI_DEVICE_ID_INTEL_HM75:
81 case PCI_DEVICE_ID_INTEL_HM70:
Alexandru Gagniucf14bd792015-02-17 17:14:31 -0600[diff] [blame]82 case PCI_DEVICE_ID_INTEL_NM70:
Dennis Wassenbergae6685f2014-10-30 10:30:40 +0100[diff] [blame]83 case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL:
84 case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM:
85 case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE:
Youness Alaoui1244a512017-04-13 13:22:33 -0400[diff] [blame]86 case PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_PREM:
Matt DeVillier5b667df2015-05-14 21:58:33 -0500[diff] [blame]87 case PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP:
qeedb775a622018-06-19 19:52:19 -0400[diff] [blame]88 case PCI_DEVICE_ID_INTEL_C8_MOBILE:
89 case PCI_DEVICE_ID_INTEL_C8_DESKTOP:
90 case PCI_DEVICE_ID_INTEL_Z87:
91 case PCI_DEVICE_ID_INTEL_Z85:
92 case PCI_DEVICE_ID_INTEL_HM86:
93 case PCI_DEVICE_ID_INTEL_H87:
94 case PCI_DEVICE_ID_INTEL_HM87:
95 case PCI_DEVICE_ID_INTEL_Q85:
96 case PCI_DEVICE_ID_INTEL_Q87:
97 case PCI_DEVICE_ID_INTEL_QM87:
98 case PCI_DEVICE_ID_INTEL_B85:
99 case PCI_DEVICE_ID_INTEL_C222:
100 case PCI_DEVICE_ID_INTEL_C224:
101 case PCI_DEVICE_ID_INTEL_C226:
102 case PCI_DEVICE_ID_INTEL_H81:
Felix Singer0a7543d2019-02-19 23:49:11 +0100[diff] [blame]103 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_PRE:
104 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_SKL:
105 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_SKL:
106 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_SKL:
107 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_KBL:
108 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_KBL:
109 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_KBL:
Matthew Garrett2bf28e52018-07-23 21:09:47 -0700[diff] [blame]110 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_BASE:
111 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_PREM:
112 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_IHDCP_PREM:
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]113 rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe;
114 break;
115 case PCI_DEVICE_ID_INTEL_ICH:
116 case PCI_DEVICE_ID_INTEL_ICH0:
Joseph Smithe10757e2010-06-16 22:21:19 +0000[diff] [blame]117 case PCI_DEVICE_ID_INTEL_ICH2:
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]118 case PCI_DEVICE_ID_INTEL_ICH4:
119 case PCI_DEVICE_ID_INTEL_ICH4M:
Idwer Vollering312fc962010-12-17 22:34:58 +0000[diff] [blame]120 case PCI_DEVICE_ID_INTEL_ICH5:
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]121 printf("This southbridge does not have RCBA.\n");
122 return 1;
123 default:
124 printf("Error: Dumping RCBA on this southbridge is not (yet) supported.\n");
125 return 1;
126 }
127
Stefan Reinauer1162f252008-12-04 15:18:20 +0000[diff] [blame]128 rcba = map_physical(rcba_phys, size);
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]129
Stefan Reinauer1162f252008-12-04 15:18:20 +0000[diff] [blame]130 if (rcba == NULL) {
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]131 perror("Error mapping RCBA");
132 exit(1);
133 }
134
135 printf("RCBA = 0x%08x (MEM)\n\n", rcba_phys);
136
137 for (i = 0; i < size; i += 4) {
Michael Niewöhner10d52212020-03-13 19:08:21 +0100[diff] [blame]138 if (read32(rcba + i))
139 printf("0x%04x: 0x%08x\n", i, read32(rcba + i));
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]140 }
141
Stefan Reinauer1162f252008-12-04 15:18:20 +0000[diff] [blame]142 unmap_physical((void *)rcba, size);
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]143 return 0;
144}