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Furquan Shaikh5cc41f22020-05-11 12:11:27 -07001/* SPDX-License-Identifier: GPL-2.0-only */
Furquan Shaikh5cc41f22020-05-11 12:11:27 -07002
3#include <console/console.h>
4#include <espi.h>
5#include <stdint.h>
6
7void espi_show_slave_general_configuration(uint32_t config)
8{
9 uint32_t io_mode;
10 uint32_t op_freq;
11
12 printk(BIOS_DEBUG, "eSPI Slave configuration:\n");
13
14 if (config & ESPI_SLAVE_CRC_ENABLE)
15 printk(BIOS_DEBUG, " CRC checking enabled\n");
16
17 if (config & ESPI_SLAVE_RESP_MOD_ENABLE)
18 printk(BIOS_DEBUG, " Response modifier enabled\n");
19
20 if (config & ESPI_SLAVE_ALERT_MODE_PIN)
21 printk(BIOS_DEBUG, " Dedicated Alert# used to signal alert event\n");
22 else
23 printk(BIOS_DEBUG, " IO bit1 pin used to signal alert event\n");
24
25 io_mode = config & ESPI_SLAVE_IO_MODE_SEL_MASK;
Furquan Shaikh69d5bbf2020-05-12 15:46:16 -070026 switch (io_mode) {
27 case ESPI_SLAVE_IO_MODE_SEL_SINGLE:
Furquan Shaikh5cc41f22020-05-11 12:11:27 -070028 printk(BIOS_DEBUG, " eSPI single IO mode selected\n");
Furquan Shaikh69d5bbf2020-05-12 15:46:16 -070029 break;
30 case ESPI_SLAVE_IO_MODE_SEL_DUAL:
Furquan Shaikh5cc41f22020-05-11 12:11:27 -070031 printk(BIOS_DEBUG, " eSPI dual IO mode selected\n");
Furquan Shaikh69d5bbf2020-05-12 15:46:16 -070032 break;
33 case ESPI_SLAVE_IO_MODE_SEL_QUAD:
Furquan Shaikh5cc41f22020-05-11 12:11:27 -070034 printk(BIOS_DEBUG, " eSPI quad IO mode selected\n");
Furquan Shaikh69d5bbf2020-05-12 15:46:16 -070035 break;
36 default:
Furquan Shaikh5cc41f22020-05-11 12:11:27 -070037 printk(BIOS_DEBUG, " Error: Invalid eSPI IO mode selected\n");
Furquan Shaikh69d5bbf2020-05-12 15:46:16 -070038 }
Furquan Shaikh5cc41f22020-05-11 12:11:27 -070039
40 io_mode = config & ESPI_SLAVE_IO_MODE_SUPP_MASK;
Furquan Shaikh69d5bbf2020-05-12 15:46:16 -070041 switch (io_mode) {
42 case ESPI_SLAVE_IO_MODE_SUPP_SINGLE_QUAD:
Furquan Shaikh5cc41f22020-05-11 12:11:27 -070043 printk(BIOS_DEBUG, " eSPI quad and single IO modes supported\n");
Furquan Shaikh69d5bbf2020-05-12 15:46:16 -070044 break;
45 case ESPI_SLAVE_IO_MODE_SUPP_SINGLE_DUAL:
46 printk(BIOS_DEBUG, " eSPI dual and single IO modes supported\n");
47 break;
48 case ESPI_SLAVE_IO_MODE_SUPP_SINGLE_DUAL_QUAD:
49 printk(BIOS_DEBUG, " eSPI quad, dual and single IO modes supported\n");
50 break;
51 default:
Furquan Shaikh5cc41f22020-05-11 12:11:27 -070052 printk(BIOS_DEBUG, " Only eSPI single IO mode supported\n");
Furquan Shaikh69d5bbf2020-05-12 15:46:16 -070053 }
Furquan Shaikh5cc41f22020-05-11 12:11:27 -070054
55 if (config & ESPI_SLAVE_OPEN_DRAIN_ALERT_SEL)
56 printk(BIOS_DEBUG, " Alert# pin is open-drain\n");
57 else
58 printk(BIOS_DEBUG, " Alert# pin is driven\n");
59
60 op_freq = config & ESPI_SLAVE_OP_FREQ_SEL_MASK;
Furquan Shaikh69d5bbf2020-05-12 15:46:16 -070061 switch (op_freq) {
62 case ESPI_SLAVE_OP_FREQ_SEL_20_MHZ:
Furquan Shaikh5cc41f22020-05-11 12:11:27 -070063 printk(BIOS_DEBUG, " eSPI 20MHz selected\n");
Furquan Shaikh69d5bbf2020-05-12 15:46:16 -070064 break;
65 case ESPI_SLAVE_OP_FREQ_SEL_25_MHZ:
Furquan Shaikh5cc41f22020-05-11 12:11:27 -070066 printk(BIOS_DEBUG, " eSPI 25MHz selected\n");
Furquan Shaikh69d5bbf2020-05-12 15:46:16 -070067 break;
68 case ESPI_SLAVE_OP_FREQ_SEL_33_MHZ:
Furquan Shaikh5cc41f22020-05-11 12:11:27 -070069 printk(BIOS_DEBUG, " eSPI 33MHz selected\n");
Furquan Shaikh69d5bbf2020-05-12 15:46:16 -070070 break;
71 case ESPI_SLAVE_OP_FREQ_SEL_50_MHZ:
Furquan Shaikh5cc41f22020-05-11 12:11:27 -070072 printk(BIOS_DEBUG, " eSPI 50MHz selected\n");
Furquan Shaikh69d5bbf2020-05-12 15:46:16 -070073 break;
74 case ESPI_SLAVE_OP_FREQ_SEL_66_MHZ:
Furquan Shaikh5cc41f22020-05-11 12:11:27 -070075 printk(BIOS_DEBUG, " eSPI 66MHz selected\n");
Furquan Shaikh69d5bbf2020-05-12 15:46:16 -070076 break;
77 default:
Furquan Shaikh5cc41f22020-05-11 12:11:27 -070078 printk(BIOS_DEBUG, " Error: Invalid eSPI frequency\n");
Furquan Shaikh69d5bbf2020-05-12 15:46:16 -070079 }
Furquan Shaikh5cc41f22020-05-11 12:11:27 -070080
81 if (config & ESPI_SLAVE_OPEN_DRAIN_ALERT_SUPP)
82 printk(BIOS_DEBUG, " Open-drain Alert# pin supported\n");
83
84 op_freq = config & ESPI_SLAVE_OP_FREQ_SUPP_MASK;
Furquan Shaikh69d5bbf2020-05-12 15:46:16 -070085 switch (op_freq) {
86 case ESPI_SLAVE_OP_FREQ_SUPP_20_MHZ:
87 printk(BIOS_DEBUG, " eSPI up to 20MHz supported\n");
88 break;
89 case ESPI_SLAVE_OP_FREQ_SUPP_25_MHZ:
90 printk(BIOS_DEBUG, " eSPI up to 25MHz supported\n");
91 break;
92 case ESPI_SLAVE_OP_FREQ_SUPP_33_MHZ:
93 printk(BIOS_DEBUG, " eSPI up to 33MHz supported\n");
94 break;
95 case ESPI_SLAVE_OP_FREQ_SUPP_50_MHZ:
96 printk(BIOS_DEBUG, " eSPI up to 50MHz supported\n");
97 break;
98 case ESPI_SLAVE_OP_FREQ_SUPP_66_MHZ:
99 printk(BIOS_DEBUG, " eSPI up to 66MHz supported\n");
100 break;
101 default:
Furquan Shaikh5cc41f22020-05-11 12:11:27 -0700102 printk(BIOS_DEBUG, " Error: Invalid eSPI frequency\n");
Furquan Shaikh69d5bbf2020-05-12 15:46:16 -0700103 }
Furquan Shaikh5cc41f22020-05-11 12:11:27 -0700104
105 printk(BIOS_DEBUG, " Maximum Wait state: %d\n",
106 (config & ESPI_SLAVE_MAX_WAIT_MASK) >> ESPI_SLAVE_MAX_WAIT_SHIFT);
107
108 if (config & ESPI_SLAVE_PERIPH_CH_SUPP)
109 printk(BIOS_DEBUG, " Peripheral Channel supported\n");
110 if (config & ESPI_SLAVE_VW_CH_SUPP)
111 printk(BIOS_DEBUG, " Virtual Wire Channel supported\n");
112 if (config & ESPI_SLAVE_OOB_CH_SUPP)
113 printk(BIOS_DEBUG, " OOB Channel supported\n");
114 if (config & ESPI_SLAVE_FLASH_CH_SUPP)
115 printk(BIOS_DEBUG, " Flash Access Channel supported\n");
116 printk(BIOS_DEBUG, "\n");
117}