Martin Roth | 9231f0b | 2022-10-28 22:39:23 -0600 | [diff] [blame] | 1 | ## SPDX-License-Identifier: GPL-2.0-only |
Alexandru Gagniuc | 7e86cd4 | 2015-10-06 10:33:49 -0700 | [diff] [blame] | 2 | ifeq ($(CONFIG_SOC_INTEL_APOLLOLAKE),y) |
| 3 | |
Michael Niewöhner | 7736bfc | 2019-10-22 23:05:06 +0200 | [diff] [blame] | 4 | subdirs-y += ../../../cpu/intel/common |
Alexandru Gagniuc | 7e86cd4 | 2015-10-06 10:33:49 -0700 | [diff] [blame] | 5 | subdirs-y += ../../../cpu/intel/microcode |
| 6 | subdirs-y += ../../../cpu/intel/turbo |
Alexandru Gagniuc | 7e86cd4 | 2015-10-06 10:33:49 -0700 | [diff] [blame] | 7 | |
Werner Zeh | 5c808e0 | 2022-05-19 09:16:28 +0200 | [diff] [blame] | 8 | bootblock-$(CONFIG_TPM_MEASURED_BOOT) += bootblock/bootblock_measure.c |
Alexandru Gagniuc | dfc2b31 | 2015-10-06 17:16:41 -0700 | [diff] [blame] | 9 | bootblock-y += bootblock/bootblock.c |
Michael Niewöhner | 310c763 | 2020-10-01 22:28:03 +0200 | [diff] [blame] | 10 | bootblock-y += ../common/block/cpu/pm_timer_emulation.c |
Aaron Durbin | 595688a | 2016-03-31 11:38:13 -0500 | [diff] [blame] | 11 | bootblock-y += car.c |
Furquan Shaikh | b13bd1e | 2020-09-21 22:44:27 +0000 | [diff] [blame] | 12 | bootblock-y += heci.c |
Ravi Sarawadi | 3669a06 | 2018-02-27 13:23:42 -0800 | [diff] [blame] | 13 | bootblock-y += gspi.c |
Rizwan Qureshi | ae6a4b6 | 2017-04-26 21:06:35 +0530 | [diff] [blame] | 14 | bootblock-y += i2c.c |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 15 | bootblock-y += lpc.c |
Andrey Petrov | 5672dcd | 2016-02-12 15:12:43 -0800 | [diff] [blame] | 16 | bootblock-y += mmap_boot.c |
Andrey Petrov | 3dbea29 | 2016-06-14 22:20:28 -0700 | [diff] [blame] | 17 | bootblock-y += pmutil.c |
Furquan Shaikh | 6ac226d | 2016-06-15 17:13:20 -0700 | [diff] [blame] | 18 | bootblock-y += spi.c |
Nico Huber | a96e66a | 2018-11-11 02:51:14 +0100 | [diff] [blame] | 19 | bootblock-y += uart.c |
Brenton Dong | c9b3981 | 2016-10-18 13:57:54 -0700 | [diff] [blame] | 20 | |
Aaron Durbin | 595688a | 2016-03-31 11:38:13 -0500 | [diff] [blame] | 21 | romstage-y += car.c |
Subrata Banik | 1799011 | 2019-08-27 11:01:33 +0530 | [diff] [blame] | 22 | romstage-y += ../../../cpu/intel/car/romstage.c |
Michael Niewöhner | b17f3d3 | 2019-10-24 00:19:45 +0200 | [diff] [blame] | 23 | romstage-y += romstage.c |
Usha P | aaf28d2 | 2020-02-17 15:14:18 +0530 | [diff] [blame] | 24 | romstage-y += report_platform.c |
Ravi Sarawadi | 3669a06 | 2018-02-27 13:23:42 -0800 | [diff] [blame] | 25 | romstage-y += gspi.c |
Furquan Shaikh | b13bd1e | 2020-09-21 22:44:27 +0000 | [diff] [blame] | 26 | romstage-y += heci.c |
Rizwan Qureshi | ae6a4b6 | 2017-04-26 21:06:35 +0530 | [diff] [blame] | 27 | romstage-y += i2c.c |
Nico Huber | a96e66a | 2018-11-11 02:51:14 +0100 | [diff] [blame] | 28 | romstage-y += uart.c |
Aaron Durbin | fc2e741 | 2016-05-12 12:43:37 -0500 | [diff] [blame] | 29 | romstage-y += meminit.c |
Angel Pons | b36100f | 2020-09-07 13:18:10 +0200 | [diff] [blame] | 30 | ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y) |
Ravi Sarawadi | 09195ac | 2017-07-20 15:11:19 -0700 | [diff] [blame] | 31 | romstage-y += meminit_util_glk.c |
| 32 | else |
| 33 | romstage-y += meminit_util_apl.c |
| 34 | endif |
Andrey Petrov | 5672dcd | 2016-02-12 15:12:43 -0800 | [diff] [blame] | 35 | romstage-y += mmap_boot.c |
Hannah Williams | 01bc897 | 2016-02-04 20:13:34 -0800 | [diff] [blame] | 36 | romstage-y += pmutil.c |
Andrey Petrov | 0f593c2 | 2016-06-17 15:30:13 -0700 | [diff] [blame] | 37 | romstage-y += reset.c |
Furquan Shaikh | bae6383 | 2016-06-17 15:50:24 -0700 | [diff] [blame] | 38 | romstage-y += spi.c |
Andrey Petrov | 87fb1a6 | 2016-02-10 17:47:03 -0800 | [diff] [blame] | 39 | |
Aaron Durbin | b3f5418 | 2016-05-26 14:22:34 -0500 | [diff] [blame] | 40 | smm-y += mmap_boot.c |
Hannah Williams | 01bc897 | 2016-02-04 20:13:34 -0800 | [diff] [blame] | 41 | smm-y += pmutil.c |
Hannah Williams | d9c84ca | 2016-05-13 00:47:14 -0700 | [diff] [blame] | 42 | smm-y += smihandler.c |
Aaron Durbin | b3f5418 | 2016-05-26 14:22:34 -0500 | [diff] [blame] | 43 | smm-y += spi.c |
Nico Huber | a96e66a | 2018-11-11 02:51:14 +0100 | [diff] [blame] | 44 | smm-y += uart.c |
Furquan Shaikh | c83e70e | 2018-06-25 14:29:48 -0700 | [diff] [blame] | 45 | smm-y += elog.c |
Karthikeyan Ramasubramanian | 0f71831 | 2019-07-03 13:02:37 -0600 | [diff] [blame] | 46 | smm-y += xhci.c |
Lance Zhao | f51b127 | 2015-11-09 17:06:34 -0800 | [diff] [blame] | 47 | |
| 48 | ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c |
Ravi Sarawadi | 9d903a1 | 2016-03-04 21:33:04 -0800 | [diff] [blame] | 49 | ramstage-y += cpu.c |
Andrey Petrov | 70efecd | 2016-03-04 21:41:13 -0800 | [diff] [blame] | 50 | ramstage-y += chip.c |
Aaron Durbin | 7d14af8 | 2017-02-07 11:33:56 -0600 | [diff] [blame] | 51 | ramstage-y += cse.c |
Brandon Breitenstein | 3b0e761 | 2016-07-18 15:14:12 -0700 | [diff] [blame] | 52 | ramstage-y += elog.c |
Nico Huber | 2a16331 | 2020-01-06 17:42:45 +0100 | [diff] [blame] | 53 | ramstage-y += graphics.c |
Ravi Sarawadi | 3669a06 | 2018-02-27 13:23:42 -0800 | [diff] [blame] | 54 | ramstage-y += gspi.c |
Furquan Shaikh | b13bd1e | 2020-09-21 22:44:27 +0000 | [diff] [blame] | 55 | ramstage-y += heci.c |
Duncan Laurie | ff8bce0 | 2016-06-27 10:57:13 -0700 | [diff] [blame] | 56 | ramstage-y += i2c.c |
Sean Rhodes | 026f0047 | 2022-06-20 08:09:29 +0100 | [diff] [blame] | 57 | ramstage-y += lockdown.c |
Lance Zhao | a7ff9c5 | 2015-11-12 18:19:41 -0800 | [diff] [blame] | 58 | ramstage-y += lpc.c |
Andrey Petrov | 5672dcd | 2016-02-12 15:12:43 -0800 | [diff] [blame] | 59 | ramstage-y += mmap_boot.c |
Nico Huber | a96e66a | 2018-11-11 02:51:14 +0100 | [diff] [blame] | 60 | ramstage-y += uart.c |
Saurabh Satija | 734aa87 | 2016-06-21 14:22:16 -0700 | [diff] [blame] | 61 | ramstage-y += nhlt.c |
Alexandru Gagniuc | 0581a67 | 2016-02-24 15:08:23 -0800 | [diff] [blame] | 62 | ramstage-y += spi.c |
Subrata Banik | 15129b4 | 2017-11-07 17:50:48 +0530 | [diff] [blame] | 63 | ramstage-y += systemagent.c |
Hannah Williams | 01bc897 | 2016-02-04 20:13:34 -0800 | [diff] [blame] | 64 | ramstage-y += pmutil.c |
Divya Chellap | 0b15b70 | 2017-11-29 18:53:03 +0530 | [diff] [blame] | 65 | ramstage-y += pnpconfig.c |
Hannah Williams | 733b39a | 2016-02-11 13:46:28 -0800 | [diff] [blame] | 66 | ramstage-y += pmc.c |
Andrey Petrov | 0f593c2 | 2016-06-17 15:30:13 -0700 | [diff] [blame] | 67 | ramstage-y += reset.c |
Andrey Petrov | 79fc33a | 2017-01-24 21:56:36 -0800 | [diff] [blame] | 68 | ramstage-y += xdci.c |
Venkateswarlu Vinjamuri | 6dd7b40 | 2017-02-24 15:37:30 -0800 | [diff] [blame] | 69 | ramstage-y += sd.c |
Karthikeyan Ramasubramanian | 0f71831 | 2019-07-03 13:02:37 -0600 | [diff] [blame] | 70 | ramstage-y += xhci.c |
Alexandru Gagniuc | 7e86cd4 | 2015-10-06 10:33:49 -0700 | [diff] [blame] | 71 | |
Aaron Durbin | eebe0e0 | 2016-03-18 11:19:38 -0500 | [diff] [blame] | 72 | postcar-y += mmap_boot.c |
Furquan Shaikh | 0be3da5 | 2016-06-19 23:20:43 -0700 | [diff] [blame] | 73 | postcar-y += spi.c |
Philipp Deppenwiese | 545ed7a | 2018-02-14 16:47:12 +0100 | [diff] [blame] | 74 | postcar-y += i2c.c |
Furquan Shaikh | b13bd1e | 2020-09-21 22:44:27 +0000 | [diff] [blame] | 75 | postcar-y += heci.c |
Kyösti Mälkki | 4f14cd8 | 2019-12-18 19:40:48 +0200 | [diff] [blame] | 76 | postcar-y += reset.c |
Nico Huber | a96e66a | 2018-11-11 02:51:14 +0100 | [diff] [blame] | 77 | postcar-y += uart.c |
Angel Pons | cb06cfe | 2020-02-28 22:35:56 +0100 | [diff] [blame] | 78 | postcar-y += gspi.c |
Aaron Durbin | eebe0e0 | 2016-03-18 11:19:38 -0500 | [diff] [blame] | 79 | |
Furquan Shaikh | b54a2d1 | 2016-06-01 01:55:43 -0700 | [diff] [blame] | 80 | verstage-y += car.c |
Rizwan Qureshi | ae6a4b6 | 2017-04-26 21:06:35 +0530 | [diff] [blame] | 81 | verstage-y += i2c.c |
Ravi Sarawadi | 3669a06 | 2018-02-27 13:23:42 -0800 | [diff] [blame] | 82 | verstage-y += gspi.c |
Furquan Shaikh | b13bd1e | 2020-09-21 22:44:27 +0000 | [diff] [blame] | 83 | verstage-y += heci.c |
Aaron Durbin | bef75e7 | 2016-05-26 11:00:44 -0500 | [diff] [blame] | 84 | verstage-y += mmap_boot.c |
Nico Huber | a96e66a | 2018-11-11 02:51:14 +0100 | [diff] [blame] | 85 | verstage-y += uart.c |
Aaron Durbin | bef75e7 | 2016-05-26 11:00:44 -0500 | [diff] [blame] | 86 | verstage-y += pmutil.c |
Andrey Petrov | 0f593c2 | 2016-06-17 15:30:13 -0700 | [diff] [blame] | 87 | verstage-y += reset.c |
Furquan Shaikh | 0be3da5 | 2016-06-19 23:20:43 -0700 | [diff] [blame] | 88 | verstage-y += spi.c |
Aaron Durbin | bef75e7 | 2016-05-26 11:00:44 -0500 | [diff] [blame] | 89 | |
Angel Pons | b36100f | 2020-09-07 13:18:10 +0200 | [diff] [blame] | 90 | ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y) |
Hannah Williams | 3ff14a0 | 2017-05-05 16:30:22 -0700 | [diff] [blame] | 91 | bootblock-y += gpio_glk.c |
| 92 | romstage-y += gpio_glk.c |
| 93 | smm-y += gpio_glk.c |
| 94 | ramstage-y += gpio_glk.c |
Hsuan-ting Chen | 642508a | 2021-10-27 10:59:41 +0000 | [diff] [blame] | 95 | verstage-y += gpio_glk.c |
Hannah Williams | 3ff14a0 | 2017-05-05 16:30:22 -0700 | [diff] [blame] | 96 | else |
| 97 | bootblock-y += gpio_apl.c |
| 98 | romstage-y += gpio_apl.c |
| 99 | smm-y += gpio_apl.c |
| 100 | ramstage-y += gpio_apl.c |
Hsuan-ting Chen | 642508a | 2021-10-27 10:59:41 +0000 | [diff] [blame] | 101 | verstage-y += gpio_apl.c |
Hannah Williams | 3ff14a0 | 2017-05-05 16:30:22 -0700 | [diff] [blame] | 102 | endif |
| 103 | |
Alexandru Gagniuc | dfc2b31 | 2015-10-06 17:16:41 -0700 | [diff] [blame] | 104 | CPPFLAGS_common += -I$(src)/soc/intel/apollolake/include |
| 105 | |
Andrey Petrov | 79091db7 | 2016-05-17 00:03:27 -0700 | [diff] [blame] | 106 | # Since FSP-M runs in CAR we need to relocate it to a specific address |
Mario Scheithauer | 4e07403 | 2019-11-06 11:01:00 +0100 | [diff] [blame] | 107 | $(call strip_quotes,$(CONFIG_FSP_M_CBFS))-options := -b $(CONFIG_FSP_M_ADDR) |
Andrey Petrov | 79091db7 | 2016-05-17 00:03:27 -0700 | [diff] [blame] | 108 | |
Aaron Durbin | 5c9df70 | 2018-04-18 01:05:25 -0600 | [diff] [blame] | 109 | # Handle GLK paging requirements |
| 110 | ifeq ($(CONFIG_PAGING_IN_CACHE_AS_RAM),y) |
| 111 | cbfs-files-y += pt |
| 112 | pt-file := pt.c:struct |
| 113 | pt-type := raw |
| 114 | cbfs-files-y += pdpt |
| 115 | pdpt-file := pdpt.c:struct |
| 116 | pdpt-type := raw |
| 117 | endif |
| 118 | |
Aaron Durbin | 9f444c3 | 2016-05-20 10:48:44 -0500 | [diff] [blame] | 119 | ifeq ($(CONFIG_NEED_LBP2),y) |
Jeremy Compostella | 0f9858f | 2019-12-12 14:39:11 -0700 | [diff] [blame] | 120 | $(objcbfs)/lbp2.bin: $(IFWITOOL) |
| 121 | ifeq ($(CONFIG_LBP2_FROM_IFWI),y) |
| 122 | $(IFWITOOL) $(CONFIG_IFWI_FILE_NAME) create -f $@ -s |
| 123 | $(IFWITOOL) $@ delete -n OBBP |
| 124 | else |
| 125 | cp $(CONFIG_LBP2_FILE_NAME) $@ |
| 126 | endif |
| 127 | |
Arthur Heymans | 34e159c | 2022-03-30 22:57:14 +0200 | [diff] [blame] | 128 | $(call add_intermediate, write_lbp2, $(objcbfs)/lbp2.bin) |
| 129 | @printf " FMAP writing lbp2 to %s\n" $(CONFIG_LBP2_FMAP_NAME) |
| 130 | $(CBFSTOOL) $< write -r $(CONFIG_LBP2_FMAP_NAME) -f $< --fill-upward |
Aaron Durbin | 9f444c3 | 2016-05-20 10:48:44 -0500 | [diff] [blame] | 131 | endif |
| 132 | |
Furquan Shaikh | 7043bf3 | 2016-05-28 12:57:05 -0700 | [diff] [blame] | 133 | # Bootblock on Apollolake platform lies in the IFWI region. In order to place |
| 134 | # the bootblock at the right location in IFWI image - |
| 135 | # a. Using ifwitool: |
| 136 | # 1. Create IFWI image (ifwi.bin.tmp) from input image |
| 137 | # (CONFIG_IFWI_FILE_NAME). |
| 138 | # 2. Delete OBBP sub-partition, if present. |
| 139 | # 3. Replace IBBL directory entry in IBBP sub-partition with currently |
| 140 | # generated bootblock.bin. |
| 141 | # b. Using cbfstool: |
| 142 | # 1. Write ifwi.bin.tmp to coreboot.rom using CONFIG_IFWI_FMAP_NAME. |
| 143 | ifeq ($(CONFIG_NEED_IFWI),y) |
Arthur Heymans | 34e159c | 2022-03-30 22:57:14 +0200 | [diff] [blame] | 144 | $(call add_intermediate, write_ifwi, $(objcbfs)/bootblock.bin $(IFWITOOL)) |
| 145 | @printf " IFWI Embedding %s in %s\n" $(objcbfs)/bootblock.bin $(CONFIG_IFWI_FMAP_NAME) |
Furquan Shaikh | 7043bf3 | 2016-05-28 12:57:05 -0700 | [diff] [blame] | 146 | $(IFWITOOL) $(CONFIG_IFWI_FILE_NAME) create -f $(objcbfs)/ifwi.bin.tmp |
| 147 | $(IFWITOOL) $(objcbfs)/ifwi.bin.tmp delete -n OBBP |
| 148 | $(IFWITOOL) $(objcbfs)/ifwi.bin.tmp replace -n IBBP -f $(objcbfs)/bootblock.bin -d -e IBBL |
Arthur Heymans | 34e159c | 2022-03-30 22:57:14 +0200 | [diff] [blame] | 149 | $(CBFSTOOL) $< write -r $(CONFIG_IFWI_FMAP_NAME) -f $(objcbfs)/ifwi.bin.tmp --fill-upward |
Furquan Shaikh | 7043bf3 | 2016-05-28 12:57:05 -0700 | [diff] [blame] | 150 | endif |
| 151 | |
Arthur Heymans | 7e0af33 | 2022-03-30 23:04:35 +0200 | [diff] [blame] | 152 | # When booting APL the IBBL loader places the microcode updates embedded |
| 153 | # in the IFWI image and a matching FIT table in SRAM. After copying the |
| 154 | # bootblock to SRAM, it updates the FIT pointer at 0xffffffc0 to point |
| 155 | # to that table. Before releasing the x86 cores from reset, the regular FIT |
| 156 | # mechanism does the updates. So coreboot does not need to generate a FIT |
| 157 | # table + pointer, but reserving the pointer is still needed. Otherwise the |
| 158 | # IBBL loader thrashes code there. So include fit.c so that the linker |
| 159 | # reserves that pointer. |
Werner Zeh | 458cfae | 2022-05-20 07:02:50 +0200 | [diff] [blame] | 160 | bootblock-y += bootblock/fit.c |
Arthur Heymans | 7e0af33 | 2022-03-30 23:04:35 +0200 | [diff] [blame] | 161 | |
Saurabh Satija | 734aa87 | 2016-06-21 14:22:16 -0700 | [diff] [blame] | 162 | # DSP firmware settings files. |
Angel Pons | b36100f | 2020-09-07 13:18:10 +0200 | [diff] [blame] | 163 | ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y) |
Hannah Williams | 96939ae | 2017-11-01 11:01:20 -0700 | [diff] [blame] | 164 | NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/glk/nhlt-blobs |
| 165 | else |
Saurabh Satija | 734aa87 | 2016-06-21 14:22:16 -0700 | [diff] [blame] | 166 | NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/apollolake/nhlt-blobs |
Hannah Williams | 96939ae | 2017-11-01 11:01:20 -0700 | [diff] [blame] | 167 | endif |
Sathyanarayana Nujella | 3e0a3fb | 2016-10-26 17:31:36 -0700 | [diff] [blame] | 168 | DMIC_1CH_48KHZ_16B = dmic-1ch-48khz-16b.bin |
Saurabh Satija | 734aa87 | 2016-06-21 14:22:16 -0700 | [diff] [blame] | 169 | DMIC_2CH_48KHZ_16B = dmic-2ch-48khz-16b.bin |
Sathyanarayana Nujella | 3e0a3fb | 2016-10-26 17:31:36 -0700 | [diff] [blame] | 170 | DMIC_4CH_48KHZ_16B = dmic-4ch-48khz-16b.bin |
Saurabh Satija | 734aa87 | 2016-06-21 14:22:16 -0700 | [diff] [blame] | 171 | MAX98357_RENDER = max98357-render-2ch-48khz-24b.bin |
| 172 | DA7219_RENDER_CAPTURE = dialog-2ch-48khz-24b.bin |
Naveen Manohar | 532b8d5 | 2018-04-27 15:24:45 +0530 | [diff] [blame] | 173 | RT5682_RENDER_CAPTURE = rt5682-2ch-48khz-24b.bin |
Saurabh Satija | 734aa87 | 2016-06-21 14:22:16 -0700 | [diff] [blame] | 174 | |
Sathyanarayana Nujella | 3e0a3fb | 2016-10-26 17:31:36 -0700 | [diff] [blame] | 175 | cbfs-files-$(CONFIG_NHLT_DMIC_1CH_16B) += $(DMIC_1CH_48KHZ_16B) |
| 176 | $(DMIC_1CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_1CH_48KHZ_16B) |
| 177 | $(DMIC_1CH_48KHZ_16B)-type := raw |
| 178 | |
Saurabh Satija | 6f23374 | 2016-08-18 14:08:37 -0700 | [diff] [blame] | 179 | cbfs-files-$(CONFIG_NHLT_DMIC_2CH_16B) += $(DMIC_2CH_48KHZ_16B) |
Saurabh Satija | 734aa87 | 2016-06-21 14:22:16 -0700 | [diff] [blame] | 180 | $(DMIC_2CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_2CH_48KHZ_16B) |
| 181 | $(DMIC_2CH_48KHZ_16B)-type := raw |
| 182 | |
Sathyanarayana Nujella | 3e0a3fb | 2016-10-26 17:31:36 -0700 | [diff] [blame] | 183 | cbfs-files-$(CONFIG_NHLT_DMIC_4CH_16B) += $(DMIC_4CH_48KHZ_16B) |
| 184 | $(DMIC_4CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_4CH_48KHZ_16B) |
| 185 | $(DMIC_4CH_48KHZ_16B)-type := raw |
| 186 | |
Saurabh Satija | 734aa87 | 2016-06-21 14:22:16 -0700 | [diff] [blame] | 187 | cbfs-files-$(CONFIG_NHLT_MAX98357) += $(MAX98357_RENDER) |
| 188 | $(MAX98357_RENDER)-file := $(NHLT_BLOB_PATH)/$(MAX98357_RENDER) |
| 189 | $(MAX98357_RENDER)-type := raw |
| 190 | |
| 191 | cbfs-files-$(CONFIG_NHLT_DA7219) += $(DA7219_RENDER_CAPTURE) |
| 192 | $(DA7219_RENDER_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(DA7219_RENDER_CAPTURE) |
| 193 | $(DA7219_RENDER_CAPTURE)-type := raw |
| 194 | |
Naveen Manohar | 532b8d5 | 2018-04-27 15:24:45 +0530 | [diff] [blame] | 195 | cbfs-files-$(CONFIG_NHLT_RT5682) += $(RT5682_RENDER_CAPTURE) |
| 196 | $(RT5682_RENDER_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(RT5682_RENDER_CAPTURE) |
| 197 | $(RT5682_RENDER_CAPTURE)-type := raw |
| 198 | |
Angel Pons | b36100f | 2020-09-07 13:18:10 +0200 | [diff] [blame] | 199 | ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y) |
Nico Huber | bae03a5 | 2018-11-14 17:46:14 +0100 | [diff] [blame] | 200 | # Gemini Lake B0 (706a1) only atm. |
Arthur Heymans | a449290 | 2019-06-17 10:50:47 +0200 | [diff] [blame] | 201 | cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-7a-*) |
Nico Huber | bae03a5 | 2018-11-14 17:46:14 +0100 | [diff] [blame] | 202 | else |
| 203 | # Apollo Lake 506c2, B0 (506c9) and E0 (506ca) only atm. |
Arthur Heymans | a449290 | 2019-06-17 10:50:47 +0200 | [diff] [blame] | 204 | cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-5c-*) |
Alexandru Gagniuc | 7e86cd4 | 2015-10-06 10:33:49 -0700 | [diff] [blame] | 205 | endif |
Nico Huber | bae03a5 | 2018-11-14 17:46:14 +0100 | [diff] [blame] | 206 | |
| 207 | endif # if CONFIG_SOC_INTEL_APOLLOLAKE |