Martin Roth | 9231f0b | 2022-10-28 22:39:23 -0600 | [diff] [blame] | 1 | ## SPDX-License-Identifier: GPL-2.0-only |
Subrata Banik | b3ced6a | 2020-08-04 13:34:03 +0530 | [diff] [blame] | 2 | ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE),y) |
Subrata Banik | 292afef | 2020-09-09 13:34:18 +0530 | [diff] [blame] | 3 | subdirs-y += romstage |
| 4 | subdirs-y += ../../../cpu/intel/microcode |
| 5 | subdirs-y += ../../../cpu/intel/turbo |
Subrata Banik | 292afef | 2020-09-09 13:34:18 +0530 | [diff] [blame] | 6 | |
Subrata Banik | 2871e0e | 2020-09-27 11:30:58 +0530 | [diff] [blame] | 7 | # all (bootblock, verstage, romstage, postcar, ramstage) |
| 8 | all-y += gspi.c |
| 9 | all-y += i2c.c |
| 10 | all-y += pmutil.c |
| 11 | all-y += spi.c |
| 12 | all-y += uart.c |
| 13 | |
Subrata Banik | b3ced6a | 2020-08-04 13:34:03 +0530 | [diff] [blame] | 14 | bootblock-y += bootblock/bootblock.c |
Subrata Banik | b3ced6a | 2020-08-04 13:34:03 +0530 | [diff] [blame] | 15 | bootblock-y += bootblock/pch.c |
| 16 | bootblock-y += bootblock/report_platform.c |
Subrata Banik | 292afef | 2020-09-09 13:34:18 +0530 | [diff] [blame] | 17 | bootblock-y += espi.c |
| 18 | bootblock-y += p2sb.c |
Reka Norman | e790f92 | 2022-04-06 20:33:54 +1000 | [diff] [blame] | 19 | bootblock-$(CONFIG_ALDERLAKE_CONFIGURE_DESCRIPTOR) += bootblock/update_descriptor.c |
Subrata Banik | 292afef | 2020-09-09 13:34:18 +0530 | [diff] [blame] | 20 | |
| 21 | romstage-y += espi.c |
| 22 | romstage-y += meminit.c |
Eric Lai | f8248f3 | 2020-12-31 11:43:29 +0800 | [diff] [blame] | 23 | romstage-y += pcie_rp.c |
Subrata Banik | 292afef | 2020-09-09 13:34:18 +0530 | [diff] [blame] | 24 | romstage-y += reset.c |
Tim Wawrzynczak | b0d3a01 | 2021-12-02 16:19:29 -0700 | [diff] [blame] | 25 | romstage-y += cpu.c |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 26 | |
Subrata Banik | 2871e0e | 2020-09-27 11:30:58 +0530 | [diff] [blame] | 27 | ramstage-y += acpi.c |
| 28 | ramstage-y += chip.c |
| 29 | ramstage-y += cpu.c |
| 30 | ramstage-y += elog.c |
| 31 | ramstage-y += espi.c |
| 32 | ramstage-y += finalize.c |
| 33 | ramstage-y += fsp_params.c |
Tim Crawford | c6529c7 | 2022-11-01 11:42:28 -0600 | [diff] [blame] | 34 | ramstage-y += graphics.c |
Michał Żygowski | 9b0f169 | 2022-05-05 13:21:01 +0200 | [diff] [blame] | 35 | ramstage-y += hsphy.c |
Subrata Banik | 2871e0e | 2020-09-27 11:30:58 +0530 | [diff] [blame] | 36 | ramstage-y += lockdown.c |
| 37 | ramstage-y += me.c |
| 38 | ramstage-y += p2sb.c |
Eric Lai | f8248f3 | 2020-12-31 11:43:29 +0800 | [diff] [blame] | 39 | ramstage-y += pcie_rp.c |
Subrata Banik | 2871e0e | 2020-09-27 11:30:58 +0530 | [diff] [blame] | 40 | ramstage-y += pmc.c |
| 41 | ramstage-y += reset.c |
Michał Żygowski | 9df95d9 | 2022-04-08 17:02:35 +0200 | [diff] [blame] | 42 | ramstage-$(CONFIG_SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT) += retimer.c |
Subrata Banik | 2871e0e | 2020-09-27 11:30:58 +0530 | [diff] [blame] | 43 | ramstage-y += soundwire.c |
| 44 | ramstage-y += systemagent.c |
John | 848b425 | 2022-03-09 17:51:56 -0800 | [diff] [blame] | 45 | ramstage-y += tcss.c |
V Sowmya | c6d7166 | 2021-07-15 08:11:08 +0530 | [diff] [blame] | 46 | ramstage-y += vr_config.c |
Tim Wawrzynczak | 291b58f | 2020-11-10 10:25:04 -0700 | [diff] [blame] | 47 | ramstage-y += xhci.c |
Francois Toguo | cea4f92 | 2021-04-16 21:20:39 -0700 | [diff] [blame] | 48 | ramstage-$(CONFIG_SOC_INTEL_CRASHLOG) += crashlog.c |
Zhixing Ma | eb35327 | 2022-09-27 11:11:58 -0700 | [diff] [blame] | 49 | ramstage-y += smbios.c |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 50 | |
Sugnan Prabhu S | f040f75 | 2021-03-26 10:58:49 +0530 | [diff] [blame] | 51 | smm-y += elog.c |
Subrata Banik | 2871e0e | 2020-09-27 11:30:58 +0530 | [diff] [blame] | 52 | smm-y += p2sb.c |
| 53 | smm-y += pmutil.c |
| 54 | smm-y += smihandler.c |
| 55 | smm-y += uart.c |
Sugnan Prabhu S | f040f75 | 2021-03-26 10:58:49 +0530 | [diff] [blame] | 56 | smm-y += xhci.c |
Subrata Banik | aab8bb2 | 2020-09-21 16:03:43 +0530 | [diff] [blame] | 57 | |
Michał Kopeć | febaf2f | 2022-04-07 14:14:31 +0200 | [diff] [blame] | 58 | ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_S),y) |
| 59 | bootblock-y += gpio_pch_s.c |
| 60 | romstage-y += gpio_pch_s.c |
| 61 | ramstage-y += gpio_pch_s.c |
| 62 | smm-y += gpio_pch_s.c |
| 63 | verstage-y += gpio_pch_s.c |
| 64 | else |
| 65 | bootblock-y += gpio.c |
| 66 | romstage-y += gpio.c |
| 67 | ramstage-y += gpio.c |
| 68 | smm-y += gpio.c |
| 69 | verstage-y += gpio.c |
| 70 | endif |
| 71 | |
Subrata Banik | b3ced6a | 2020-08-04 13:34:03 +0530 | [diff] [blame] | 72 | CPPFLAGS_common += -I$(src)/soc/intel/alderlake |
| 73 | CPPFLAGS_common += -I$(src)/soc/intel/alderlake/include |
Furquan Shaikh | f888c68 | 2021-10-05 21:37:33 -0700 | [diff] [blame] | 74 | |
Michał Żygowski | 6297df8 | 2022-06-30 16:22:35 +0200 | [diff] [blame] | 75 | ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_S),y) |
| 76 | # 06-97-00, 06-97-01, 06-97-04 are ADL-S Engineering Samples |
| 77 | # 06-97-02 are ADL-S/HX Quality Samples but also ADL-HX Engineering Samples |
| 78 | # ADL-S/HX C0 |
| 79 | cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-97-02 |
| 80 | # ADL-S H0 |
| 81 | cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-97-05 |
| 82 | else |
| 83 | ifneq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_N),y) |
| 84 | # 06-9a-00, 06-9a-01 are ADL-P/ADL-M Engineering Samples |
| 85 | # Missing 06-9a-02 ADL-P K0 |
| 86 | # ADL-P L0 |
| 87 | cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9a-03 |
| 88 | # ADL-P R0 and ADL-M R0 |
| 89 | cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9a-04 |
| 90 | endif |
| 91 | endif |
| 92 | |
Furquan Shaikh | f888c68 | 2021-10-05 21:37:33 -0700 | [diff] [blame] | 93 | ifeq ($(CONFIG_STITCH_ME_BIN),y) |
| 94 | |
Bernardo Perez Priego | aba1c13 | 2021-10-20 21:13:29 -0700 | [diff] [blame] | 95 | $(eval $(call cse_add_dummy_to_bp1_bp2,DLMP)) |
| 96 | $(eval $(call cse_add_dummy_to_bp1_bp2,IFPP)) |
| 97 | $(eval $(call cse_add_dummy_to_bp1_bp2,SBDT)) |
| 98 | $(eval $(call cse_add_decomp_to_bp1_bp2,RBEP)) |
| 99 | $(eval $(call cse_add_dummy_to_bp1_bp2,UFSP)) |
| 100 | $(eval $(call cse_add_dummy_to_bp1_bp2,UFSG)) |
Ravindra N | 0709218 | 2021-12-06 10:11:51 +0530 | [diff] [blame] | 101 | $(eval $(call cse_add_input_to_bp1_bp2,OEMP)) |
Bernardo Perez Priego | aba1c13 | 2021-10-20 21:13:29 -0700 | [diff] [blame] | 102 | $(eval $(call cse_add_input_to_bp1_bp2,PMCP)) |
| 103 | $(eval $(call cse_add_decomp,bp1,MFTP)) |
| 104 | $(eval $(call cse_add_decomp,bp2,FTPR)) |
| 105 | $(eval $(call cse_add_input_to_bp1_bp2,IOMP)) |
| 106 | $(eval $(call cse_add_input_to_bp1_bp2,NPHY)) |
| 107 | $(eval $(call cse_add_input_to_bp1_bp2,TBTP)) |
| 108 | $(eval $(call cse_add_input_to_bp1_bp2,PCHC)) |
| 109 | $(eval $(call cse_add_decomp,bp2,NFTP)) |
| 110 | $(eval $(call cse_add_dummy,bp2,ISHP)) |
| 111 | $(eval $(call cse_add_input,bp2,IUNP)) |
Furquan Shaikh | f888c68 | 2021-10-05 21:37:33 -0700 | [diff] [blame] | 112 | |
| 113 | endif |
| 114 | |
Subrata Banik | b3ced6a | 2020-08-04 13:34:03 +0530 | [diff] [blame] | 115 | endif |